diff options
author | Dan Gohman <gohman@apple.com> | 2009-11-11 18:11:07 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-11-11 18:11:07 +0000 |
commit | adaace8aa8df16f1fa2b097f32ded38a49d89208 (patch) | |
tree | e75b31b365d76940002069b5f88604c34e78645a /lib/Target | |
parent | e94975ee64e8308526f1ab33f17f4f7229d9934b (diff) |
Set isBarrier = 1 on return instructions, as they are control barriers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86851 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.td | 2 | ||||
-rw-r--r-- | lib/Target/Blackfin/BlackfinInstrInfo.td | 1 | ||||
-rw-r--r-- | lib/Target/MSP430/MSP430InstrInfo.td | 2 | ||||
-rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.td | 2 | ||||
-rw-r--r-- | lib/Target/XCore/XCoreInstrInfo.td | 2 |
5 files changed, 5 insertions, 4 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.td b/lib/Target/Alpha/AlphaInstrInfo.td index 81e1fb7c89..8917e86fe7 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.td +++ b/lib/Target/Alpha/AlphaInstrInfo.td @@ -391,7 +391,7 @@ def : Pat<(setune GPRC:$X, GPRC:$Y), (CMPEQi (CMPEQ GPRC:$X, GPRC:$Y), 0)>; def : Pat<(setune GPRC:$X, immUExt8:$Y), (CMPEQi (CMPEQ GPRC:$X, immUExt8:$Y), 0)>; -let isReturn = 1, isTerminator = 1, Ra = 31, Rb = 26, disp = 1, Uses = [R26] in { +let isReturn = 1, isTerminator = 1, isBarrier = 1, Ra = 31, Rb = 26, disp = 1, Uses = [R26] in { def RETDAG : MbrForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", s_jsr>; //Return from subroutine def RETDAGp : MbrpForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", [(retflag)], s_jsr>; //Return from subroutine } diff --git a/lib/Target/Blackfin/BlackfinInstrInfo.td b/lib/Target/Blackfin/BlackfinInstrInfo.td index c952af14f1..88ff85f5d4 100644 --- a/lib/Target/Blackfin/BlackfinInstrInfo.td +++ b/lib/Target/Blackfin/BlackfinInstrInfo.td @@ -174,6 +174,7 @@ def CALLp: F1<(outs), (ins P:$func, variable_ops), let isReturn = 1, isTerminator = 1, + isBarrier = 1, Uses = [RETS] in def RTS: F1<(outs), (ins), "rts;", [(BfinRet)]>; diff --git a/lib/Target/MSP430/MSP430InstrInfo.td b/lib/Target/MSP430/MSP430InstrInfo.td index cb1b2c29de..c3bbfe877d 100644 --- a/lib/Target/MSP430/MSP430InstrInfo.td +++ b/lib/Target/MSP430/MSP430InstrInfo.td @@ -127,7 +127,7 @@ def NOP : Pseudo<(outs), (ins), "nop", []>; // // FIXME: Provide proper encoding! -let isReturn = 1, isTerminator = 1 in { +let isReturn = 1, isTerminator = 1, isBarrier = 1 in { def RET : Pseudo<(outs), (ins), "ret", [(MSP430retflag)]>; } diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index f2f1b96f19..d88d5080c6 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -277,7 +277,7 @@ let usesCustomInserter = 1 in { // Expanded after instruction selection. // Section A.3 - Synthetic Instructions, p. 85 // special cases of JMPL: -let isReturn = 1, isTerminator = 1, hasDelaySlot = 1 in { +let isReturn = 1, isTerminator = 1, hasDelaySlot = 1, isBarrier = 1 in { let rd = O7.Num, rs1 = G0.Num, simm13 = 8 in def RETL: F3_2<2, 0b111000, (outs), (ins), "retl", [(retflag)]>; } diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td index 68e69a2b19..4ed4ed4499 100644 --- a/lib/Target/XCore/XCoreInstrInfo.td +++ b/lib/Target/XCore/XCoreInstrInfo.td @@ -617,7 +617,7 @@ defm EXTSP : FU6_LU6_np<"extsp">; let mayStore = 1 in defm ENTSP : FU6_LU6_np<"entsp">; -let isReturn = 1, isTerminator = 1, mayLoad = 1 in { +let isReturn = 1, isTerminator = 1, mayLoad = 1, isBarrier = 1 in { defm RETSP : FU6_LU6<"retsp", XCoreRetsp>; } } |