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| author | Craig Topper <craig.topper@gmail.com> | 2012-07-01 02:55:34 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-07-01 02:55:34 +0000 |
| commit | 51e89c0d6ab7ec7d6c816c845447b1c3267775a3 (patch) | |
| tree | 0d0b8e80f85e3180352659aed12e7fff0b5824a9 /lib/Target | |
| parent | 65b382cf9172c76f09695b9dbae25ddf094e97c9 (diff) | |
Reduce code size by using a second switch statement to avoid extra calls to SelectAtomic64. Also catch cases where SelectAtomic64 fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159503 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 28 |
1 files changed, 19 insertions, 9 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 04ed80a34d..817013011c 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -2014,7 +2014,7 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) { case Intrinsic::x86_avx2_gather_q_d_256: { unsigned Opc; switch (IntNo) { - default: llvm_unreachable("Impossible intrinsic."); + default: llvm_unreachable("Impossible intrinsic"); case Intrinsic::x86_avx2_gather_d_pd: Opc = X86::VGATHERDPDrm; break; case Intrinsic::x86_avx2_gather_d_pd_256: Opc = X86::VGATHERDPDYrm; break; case Intrinsic::x86_avx2_gather_q_pd: Opc = X86::VGATHERQPDrm; break; @@ -2043,20 +2043,30 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) { case X86ISD::GlobalBaseReg: return getGlobalBaseReg(); + case X86ISD::ATOMOR64_DAG: - return SelectAtomic64(Node, X86::ATOMOR6432); case X86ISD::ATOMXOR64_DAG: - return SelectAtomic64(Node, X86::ATOMXOR6432); case X86ISD::ATOMADD64_DAG: - return SelectAtomic64(Node, X86::ATOMADD6432); case X86ISD::ATOMSUB64_DAG: - return SelectAtomic64(Node, X86::ATOMSUB6432); case X86ISD::ATOMNAND64_DAG: - return SelectAtomic64(Node, X86::ATOMNAND6432); case X86ISD::ATOMAND64_DAG: - return SelectAtomic64(Node, X86::ATOMAND6432); - case X86ISD::ATOMSWAP64_DAG: - return SelectAtomic64(Node, X86::ATOMSWAP6432); + case X86ISD::ATOMSWAP64_DAG: { + unsigned Opc; + switch (Opcode) { + default: llvm_unreachable("Impossible intrinsic"); + case X86ISD::ATOMOR64_DAG: Opc = X86::ATOMOR6432; break; + case X86ISD::ATOMXOR64_DAG: Opc = X86::ATOMXOR6432; break; + case X86ISD::ATOMADD64_DAG: Opc = X86::ATOMADD6432; break; + case X86ISD::ATOMSUB64_DAG: Opc = X86::ATOMSUB6432; break; + case X86ISD::ATOMNAND64_DAG: Opc = X86::ATOMNAND6432; break; + case X86ISD::ATOMAND64_DAG: Opc = X86::ATOMAND6432; break; + case X86ISD::ATOMSWAP64_DAG: Opc = X86::ATOMSWAP6432; break; + } + SDNode *RetVal = SelectAtomic64(Node, Opc); + if (RetVal) + return RetVal; + break; + } case ISD::ATOMIC_LOAD_ADD: { SDNode *RetVal = SelectAtomicLoadAdd(Node, NVT); |