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authorAkira Hatanaka <ahatanaka@mips.com>2013-03-04 22:25:01 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2013-03-04 22:25:01 +0000
commit1ae08e007784a0708d6dae9c37b84bb62d5e1282 (patch)
tree91a7d3162b91d1cafa5bae8c04358e0f3bfbdae8 /lib/Target
parent0b9675d631a33ecde9e11febea48a2c6551bfeec (diff)
[mips] Print move instructions.
"move $4, $5" is printed instead of "or $4, $5, $zero". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176455 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/Mips/Mips64InstrInfo.td2
-rw-r--r--lib/Target/Mips/MipsInstrInfo.td2
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td
index 494ba87b40..5903b9e623 100644
--- a/lib/Target/Mips/Mips64InstrInfo.td
+++ b/lib/Target/Mips/Mips64InstrInfo.td
@@ -313,7 +313,7 @@ def : InstAlias<"move $dst, $src",
(DADDu CPU64RegsOpnd:$dst, CPU64RegsOpnd:$src, ZERO_64), 1>,
Requires<[HasMips64]>;
def : InstAlias<"move $dst, $src",
- (OR64 CPU64RegsOpnd:$dst, CPU64RegsOpnd:$src, ZERO_64), 0>,
+ (OR64 CPU64RegsOpnd:$dst, CPU64RegsOpnd:$src, ZERO_64), 1>,
Requires<[HasMips64]>;
def : InstAlias<"and $rs, $rt, $imm",
(DANDi CPU64RegsOpnd:$rs, CPU64RegsOpnd:$rt, uimm16_64:$imm),
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td
index b71ced1493..25b5d240be 100644
--- a/lib/Target/Mips/MipsInstrInfo.td
+++ b/lib/Target/Mips/MipsInstrInfo.td
@@ -985,7 +985,7 @@ def : InstAlias<"move $dst, $src",
(ADDu CPURegsOpnd:$dst, CPURegsOpnd:$src,ZERO), 1>,
Requires<[NotMips64]>;
def : InstAlias<"move $dst, $src",
- (OR CPURegsOpnd:$dst, CPURegsOpnd:$src,ZERO), 0>,
+ (OR CPURegsOpnd:$dst, CPURegsOpnd:$src,ZERO), 1>,
Requires<[NotMips64]>;
def : InstAlias<"bal $offset", (BGEZAL RA, brtarget:$offset), 1>;
def : InstAlias<"addu $rs, $rt, $imm",