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authorChris Lattner <sabre@nondot.org>2005-04-30 04:26:56 +0000
committerChris Lattner <sabre@nondot.org>2005-04-30 04:26:56 +0000
commit08cae7f519363000928004239fdd56a4ead0a4ca (patch)
treeaa87610297adc9d170032da57e7189450a75a213 /lib/Target
parent17234b7d78944151b844e07a427df5b218add76b (diff)
Doesn't support these nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21634 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/PowerPC/PPC64ISelPattern.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPC64ISelPattern.cpp b/lib/Target/PowerPC/PPC64ISelPattern.cpp
index 1e72bf0ba6..8614a24743 100644
--- a/lib/Target/PowerPC/PPC64ISelPattern.cpp
+++ b/lib/Target/PowerPC/PPC64ISelPattern.cpp
@@ -52,6 +52,14 @@ namespace {
setOperationAction(ISD::MEMSET, MVT::Other, Expand);
setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
+ // We don't support sin/cos/sqrt
+ setOperationAction(ISD::FSIN , MVT::f64, Expand);
+ setOperationAction(ISD::FCOS , MVT::f64, Expand);
+ setOperationAction(ISD::FSQRT, MVT::f64, Expand);
+ setOperationAction(ISD::FSIN , MVT::f32, Expand);
+ setOperationAction(ISD::FCOS , MVT::f32, Expand);
+ setOperationAction(ISD::FSQRT, MVT::f32, Expand);
+
// PPC 64 has i16 and i32 but no i8 (or i1) SEXTLOAD
setOperationAction(ISD::SEXTLOAD, MVT::i1, Expand);
setOperationAction(ISD::SEXTLOAD, MVT::i8, Expand);