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authorChad Rosier <mcrosier@apple.com>2012-10-05 18:41:14 +0000
committerChad Rosier <mcrosier@apple.com>2012-10-05 18:41:14 +0000
commit9ba9d4d76bfa8de2b05cbce02a5a3ff7d46cb331 (patch)
treed03a0124fc0ed75bc3b22399ce60f61916a941bf /lib/Target/X86
parentdfb8dbb4fd97140aa9bf6b9dadbca25665144c09 (diff)
[ms-inline asm] Add a few typedefs to simplify future changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165324 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
-rw-r--r--lib/Target/X86/AsmParser/X86AsmParser.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 24f57e071c..df34359a66 100644
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -69,7 +69,7 @@ private:
bool MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out, unsigned &Kind, unsigned &Opcode,
- SmallVectorImpl<std::pair< unsigned, std::string > > &MapAndConstraints,
+ MatchInstMapAndConstraintsImpl &MapAndConstraints,
unsigned &OrigErrorInfo, bool matchingInlineAsm = false);
/// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi)
@@ -1526,7 +1526,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
unsigned Kind;
unsigned Opcode;
unsigned ErrorInfo;
- SmallVector<std::pair< unsigned, std::string >, 4> MapAndConstraints;
+ MatchInstMapAndConstraints MapAndConstraints;
bool Error = MatchInstruction(IDLoc, Operands, Out, Kind, Opcode,
MapAndConstraints, ErrorInfo);
return Error;
@@ -1631,7 +1631,7 @@ MatchInstruction(SMLoc IDLoc,
unsigned Match1, Match2, Match3, Match4;
unsigned tKind;
- SmallVector<std::pair< unsigned, std::string >, 4> tMapAndConstraints[4];
+ MatchInstMapAndConstraints tMapAndConstraints[4];
Match1 = MatchInstructionImpl(Operands, tKind, Inst, tMapAndConstraints[0],
ErrorInfoIgnore, isParsingIntelSyntax());
if (Match1 == Match_Success) Kind = tKind;