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authorCraig Topper <craig.topper@gmail.com>2011-10-16 07:55:05 +0000
committerCraig Topper <craig.topper@gmail.com>2011-10-16 07:55:05 +0000
commitb53fa8bf19a51f0c49a9f8b6ede3e2ff3bdfb961 (patch)
treeb1e46ae4478216cfe10014153b5825026f99d329 /lib/Target/X86/X86Subtarget.h
parentdc479c4a897bb7cc756370cc2051da79b65e7d16 (diff)
Add X86 BZHI instruction as well as BMI2 feature detection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142122 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86Subtarget.h')
-rw-r--r--lib/Target/X86/X86Subtarget.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h
index 3258d3d0ad..81fa176bd0 100644
--- a/lib/Target/X86/X86Subtarget.h
+++ b/lib/Target/X86/X86Subtarget.h
@@ -105,6 +105,9 @@ protected:
/// HasBMI - Processor has BMI1 instructions.
bool HasBMI;
+ /// HasBMI2 - Processor has BMI2 instructions.
+ bool HasBMI2;
+
/// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
bool IsBTMemSlow;
@@ -192,6 +195,7 @@ public:
bool hasF16C() const { return HasF16C; }
bool hasLZCNT() const { return HasLZCNT; }
bool hasBMI() const { return HasBMI; }
+ bool hasBMI2() const { return HasBMI2; }
bool isBTMemSlow() const { return IsBTMemSlow; }
bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
bool hasVectorUAMem() const { return HasVectorUAMem; }