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| author | Kay Tiong Khoo <kkhoo@perfwizard.com> | 2013-02-14 19:08:21 +0000 |
|---|---|---|
| committer | Kay Tiong Khoo <kkhoo@perfwizard.com> | 2013-02-14 19:08:21 +0000 |
| commit | 7b672ed380cf44894f8b96c52558dcfc136af383 (patch) | |
| tree | 42f9c8166ddea5c024c08de639f3800b7219030c /lib/Target/X86/X86Subtarget.h | |
| parent | 01115b1f5032b848659669b161af1bdd9e646208 (diff) | |
added basic support for Intel ADX instructions
-feature flag, instructions definitions, test cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175196 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86Subtarget.h')
| -rw-r--r-- | lib/Target/X86/X86Subtarget.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h index eb587a5761..1466041712 100644 --- a/lib/Target/X86/X86Subtarget.h +++ b/lib/Target/X86/X86Subtarget.h @@ -121,6 +121,9 @@ protected: /// HasRTM - Processor has RTM instructions. bool HasRTM; + /// HasADX - Processor has ADX instructions. + bool HasADX; + /// IsBTMemSlow - True if BT (bit test) of memory instructions are slow. bool IsBTMemSlow; @@ -242,6 +245,7 @@ public: bool hasBMI() const { return HasBMI; } bool hasBMI2() const { return HasBMI2; } bool hasRTM() const { return HasRTM; } + bool hasADX() const { return HasADX; } bool isBTMemSlow() const { return IsBTMemSlow; } bool isUnalignedMemAccessFast() const { return IsUAMemFast; } bool hasVectorUAMem() const { return HasVectorUAMem; } |