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authorMichael Liao <michael.liao@intel.com>2013-03-26 22:46:02 +0000
committerMichael Liao <michael.liao@intel.com>2013-03-26 22:46:02 +0000
commit0ca1a7f177ffd29c0af49f23cc7bd5f0b56a60d0 (patch)
treebccc1a9564c7a1b77504cb639df0d8770975c89e /lib/Target/X86/X86Subtarget.h
parent6b359ecd43bbad20f417d7434d72bafccd6c2efe (diff)
Add HLE target feature
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178082 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86Subtarget.h')
-rw-r--r--lib/Target/X86/X86Subtarget.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h
index b9f29fdcee..108ef0eb1c 100644
--- a/lib/Target/X86/X86Subtarget.h
+++ b/lib/Target/X86/X86Subtarget.h
@@ -121,6 +121,9 @@ protected:
/// HasRTM - Processor has RTM instructions.
bool HasRTM;
+ /// HasHLE - Processor has HLE.
+ bool HasHLE;
+
/// HasADX - Processor has ADX instructions.
bool HasADX;
@@ -256,6 +259,7 @@ public:
bool hasBMI() const { return HasBMI; }
bool hasBMI2() const { return HasBMI2; }
bool hasRTM() const { return HasRTM; }
+ bool hasHLE() const { return HasHLE; }
bool hasADX() const { return HasADX; }
bool hasPRFCHW() const { return HasPRFCHW; }
bool isBTMemSlow() const { return IsBTMemSlow; }