diff options
| author | Eli Friedman <eli.friedman@gmail.com> | 2011-08-26 21:21:21 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2011-08-26 21:21:21 +0000 |
| commit | 43f51aeca8367ea35adad963c00bd2bc5b8d1391 (patch) | |
| tree | cb558e0aaacbddf5f406784aafe4ff13f10b5deb /lib/Target/X86/X86Subtarget.cpp | |
| parent | 51fb91c04c920703fbd4a67ac3f85c0971b2c5a5 (diff) | |
Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138660 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86Subtarget.cpp')
| -rw-r--r-- | lib/Target/X86/X86Subtarget.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index 5e6c659e53..be77d879ea 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -203,6 +203,7 @@ void X86Subtarget::AutoDetectSubtargetFeatures() { HasFMA3 = IsIntel && ((ECX >> 12) & 0x1); ToggleFeature(X86::FeatureFMA3); HasPOPCNT = IsIntel && ((ECX >> 23) & 0x1); ToggleFeature(X86::FeaturePOPCNT); HasAES = IsIntel && ((ECX >> 25) & 0x1); ToggleFeature(X86::FeatureAES); + HasCmpxchg16b = ((ECX >> 13) & 0x1); ToggleFeature(X86::FeatureCMPXCHG16B); if (IsIntel || IsAMD) { // Determine if bit test memory instructions are slow. @@ -254,6 +255,7 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU, , IsBTMemSlow(false) , IsUAMemFast(false) , HasVectorUAMem(false) + , HasCmpxchg16b(false) , stackAlignment(8) // FIXME: this is a known good value for Yonah. How about others? , MaxInlineSizeThreshold(128) |