aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/X86/X86Subtarget.cpp
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@gmail.com>2012-05-01 07:10:32 +0000
committerCraig Topper <craig.topper@gmail.com>2012-05-01 07:10:32 +0000
commitc80e7d2ea46589c5e42e09081a079392f6fbf041 (patch)
tree888f0222f42c62e345091f275e65f651692c6983 /lib/Target/X86/X86Subtarget.cpp
parentd98c9e918c9750d965c1efe9efcc9e13feacbe13 (diff)
Allow BMI, AES, F16C, POPCNT, FMA3, and CLMUL to be detected on AMD processors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155899 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86Subtarget.cpp')
-rw-r--r--lib/Target/X86/X86Subtarget.cpp18
1 files changed, 9 insertions, 9 deletions
diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index b924dc4259..2ec277a2fa 100644
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -201,11 +201,11 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
- if (IsIntel && ((ECX >> 1) & 0x1)) {
+ if ((ECX >> 1) & 0x1) {
HasCLMUL = true;
ToggleFeature(X86::FeatureCLMUL);
}
- if (IsIntel && ((ECX >> 12) & 0x1)) {
+ if ((ECX >> 12) & 0x1) {
HasFMA3 = true;
ToggleFeature(X86::FeatureFMA3);
}
@@ -213,15 +213,15 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
HasMOVBE = true;
ToggleFeature(X86::FeatureMOVBE);
}
- if (IsIntel && ((ECX >> 23) & 0x1)) {
+ if ((ECX >> 23) & 0x1) {
HasPOPCNT = true;
ToggleFeature(X86::FeaturePOPCNT);
}
- if (IsIntel && ((ECX >> 25) & 0x1)) {
+ if ((ECX >> 25) & 0x1) {
HasAES = true;
ToggleFeature(X86::FeatureAES);
}
- if (IsIntel && ((ECX >> 29) & 0x1)) {
+ if ((ECX >> 29) & 0x1) {
HasF16C = true;
ToggleFeature(X86::FeatureF16C);
}
@@ -290,9 +290,9 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
}
}
- if (IsIntel && MaxLevel >= 7) {
+ if (MaxLevel >= 7) {
if (!X86_MC::GetCpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX)) {
- if (EBX & 0x1) {
+ if (IsIntel && (EBX & 0x1)) {
HasFSGSBase = true;
ToggleFeature(X86::FeatureFSGSBase);
}
@@ -300,11 +300,11 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
HasBMI = true;
ToggleFeature(X86::FeatureBMI);
}
- if ((EBX >> 5) & 0x1) {
+ if (IsIntel && ((EBX >> 5) & 0x1)) {
X86SSELevel = AVX2;
ToggleFeature(X86::FeatureAVX2);
}
- if ((EBX >> 8) & 0x1) {
+ if (IsIntel && ((EBX >> 8) & 0x1)) {
HasBMI2 = true;
ToggleFeature(X86::FeatureBMI2);
}