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authorDan Gohman <gohman@apple.com>2008-05-28 01:50:19 +0000
committerDan Gohman <gohman@apple.com>2008-05-28 01:50:19 +0000
commitc2ecdc5a26d345712808a674774546619477efa7 (patch)
tree8c776d178de5e1da7ca05ff7c0715b3a5db60b0c /lib/Target/X86/X86InstrSSE.td
parentbfbbd4d22105213fd353e9adbefc33881961521a (diff)
Fix the encoding for two more "rm" instructions that were using MRMSrcReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51630 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrSSE.td')
-rw-r--r--lib/Target/X86/X86InstrSSE.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 613d35d0fc..1ea4bfd35e 100644
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -2778,7 +2778,7 @@ let Constraints = "$src1 = $dst" in {
(int_x86_ssse3_palign_r
VR64:$src1, VR64:$src2,
imm:$src3))]>;
- def PALIGNR64rm : SS3AI<0x0F, MRMSrcReg, (outs VR64:$dst),
+ def PALIGNR64rm : SS3AI<0x0F, MRMSrcMem, (outs VR64:$dst),
(ins VR64:$src1, i64mem:$src2, i16imm:$src3),
"palignr\t{$src3, $src2, $dst|$dst, $src2, $src3}",
[(set VR64:$dst,
@@ -2794,7 +2794,7 @@ let Constraints = "$src1 = $dst" in {
(int_x86_ssse3_palign_r_128
VR128:$src1, VR128:$src2,
imm:$src3))]>, OpSize;
- def PALIGNR128rm : SS3AI<0x0F, MRMSrcReg, (outs VR128:$dst),
+ def PALIGNR128rm : SS3AI<0x0F, MRMSrcMem, (outs VR128:$dst),
(ins VR128:$src1, i128mem:$src2, i32imm:$src3),
"palignr\t{$src3, $src2, $dst|$dst, $src2, $src3}",
[(set VR128:$dst,