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authorDan Gohman <gohman@apple.com>2008-10-16 00:03:00 +0000
committerDan Gohman <gohman@apple.com>2008-10-16 00:03:00 +0000
commita7250ddc2848bc15f96abd15a4dd872abdc2d08b (patch)
tree8ce4ccb86ee8818b306bb2d872b39c00f207cb05 /lib/Target/X86/X86InstrSSE.td
parent2276a7bc8e0af6cc759ba1b5cfe8e7cfd03c3c4c (diff)
Fix the predicate for memop64 to be a regular load, not just
an unindexed load. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57612 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrSSE.td')
-rw-r--r--lib/Target/X86/X86InstrSSE.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 1ae9935473..0a5089d1ab 100644
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -134,7 +134,7 @@ def memopv16i8 : PatFrag<(ops node:$ptr), (v16i8 (memop node:$ptr))>;
// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
// 16-byte boundary.
// FIXME: 8 byte alignment for mmx reads is not required
-def memop64 : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
+def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
return cast<LoadSDNode>(N)->getAlignment() >= 8;
}]>;