diff options
author | Evan Cheng <evan.cheng@apple.com> | 2008-05-03 00:52:09 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2008-05-03 00:52:09 +0000 |
commit | 22b942aa4df824adbd3f6eaede53abe451f616e9 (patch) | |
tree | 3a83599ec57177f92afe3b5b85963118c13fda8d /lib/Target/X86/X86InstrSSE.td | |
parent | f944c9a19ed5438ea20f20205dfb073d0f00bd9e (diff) |
Add separate intrinsics for MMX / SSE shifts with i32 integer operands. This allow us to simplify the horribly complicated matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50601 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrSSE.td')
-rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 91 |
1 files changed, 33 insertions, 58 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index e8ee9dc1c4..9c07de6fd0 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -1780,6 +1780,21 @@ multiclass PDI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId, (bitconvert (memopv2i64 addr:$src2))))]>; } +multiclass PDI_binop_rmi_int<bits<8> opc, bits<8> opc2, Format ImmForm, + string OpcodeStr, + Intrinsic IntId, Intrinsic IntId2> { + def rr : PDI<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), + !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), + [(set VR128:$dst, (IntId VR128:$src1, VR128:$src2))]>; + def rm : PDI<opc, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2), + !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), + [(set VR128:$dst, (IntId VR128:$src1, + (bitconvert (memopv2i64 addr:$src2))))]>; + def ri : PDIi8<opc2, ImmForm, (outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2), + !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), + [(set VR128:$dst, (IntId2 VR128:$src1, (i32 imm:$src2)))]>; +} + /// PDI_binop_rm - Simple SSE2 binary operator. multiclass PDI_binop_rm<bits<8> opc, string OpcodeStr, SDNode OpNode, ValueType OpVT, bit Commutable = 0> { @@ -1854,64 +1869,24 @@ defm PMAXSW : PDI_binop_rm_int<0xEE, "pmaxsw", int_x86_sse2_pmaxs_w, 1>; defm PSADBW : PDI_binop_rm_int<0xE0, "psadbw", int_x86_sse2_psad_bw, 1>; -defm PSLLW : PDI_binop_rm_int<0xF1, "psllw", int_x86_sse2_psll_w>; -defm PSLLD : PDI_binop_rm_int<0xF2, "pslld", int_x86_sse2_psll_d>; -defm PSLLQ : PDI_binop_rm_int<0xF3, "psllq", int_x86_sse2_psll_q>; - -defm PSRLW : PDI_binop_rm_int<0xD1, "psrlw", int_x86_sse2_psrl_w>; -defm PSRLD : PDI_binop_rm_int<0xD2, "psrld", int_x86_sse2_psrl_d>; -defm PSRLQ : PDI_binop_rm_int<0xD3, "psrlq", int_x86_sse2_psrl_q>; - -defm PSRAW : PDI_binop_rm_int<0xE1, "psraw", int_x86_sse2_psra_w>; -defm PSRAD : PDI_binop_rm_int<0xE2, "psrad", int_x86_sse2_psra_d>; - -// Some immediate variants need to match a bit_convert. -let Constraints = "$src1 = $dst" in { -def PSLLWri : PDIi8<0x71, MRM6r, (outs VR128:$dst), - (ins VR128:$src1, i32i8imm:$src2), - "psllw\t{$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psll_w VR128:$src1, - (bc_v8i16 (v4i32 (scalar_to_vector (i32 imm:$src2))))))]>; -def PSLLDri : PDIi8<0x72, MRM6r, (outs VR128:$dst), - (ins VR128:$src1, i32i8imm:$src2), - "pslld\t{$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psll_d VR128:$src1, - (scalar_to_vector (i32 imm:$src2))))]>; -def PSLLQri : PDIi8<0x73, MRM6r, (outs VR128:$dst), - (ins VR128:$src1, i32i8imm:$src2), - "psllq\t{$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psll_q VR128:$src1, - (bc_v2i64 (v4i32 (scalar_to_vector (i32 imm:$src2))))))]>; - -def PSRLWri : PDIi8<0x71, MRM2r, (outs VR128:$dst), - (ins VR128:$src1, i32i8imm:$src2), - "psrlw\t{$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psrl_w VR128:$src1, - (bc_v8i16 (v4i32 (scalar_to_vector (i32 imm:$src2))))))]>; -def PSRLDri : PDIi8<0x72, MRM2r, (outs VR128:$dst), - (ins VR128:$src1, i32i8imm:$src2), - "psrld\t{$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psrl_d VR128:$src1, - (scalar_to_vector (i32 imm:$src2))))]>; -def PSRLQri : PDIi8<0x73, MRM2r, (outs VR128:$dst), - (ins VR128:$src1, i32i8imm:$src2), - "psrlq\t{$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psrl_q VR128:$src1, - (bc_v2i64 (v4i32 (scalar_to_vector (i32 imm:$src2))))))]>; - -def PSRAWri : PDIi8<0x71, MRM4r, (outs VR128:$dst), - (ins VR128:$src1, i32i8imm:$src2), - "psraw\t{$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psra_w VR128:$src1, - (bc_v8i16 (v4i32 (scalar_to_vector (i32 imm:$src2))))))]>; -def PSRADri : PDIi8<0x72, MRM4r, (outs VR128:$dst), - (ins VR128:$src1, i32i8imm:$src2), - "psrad\t{$src2, $dst|$dst, $src2}", - [(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1, - (scalar_to_vector (i32 imm:$src2))))]>; -} - -// PSRAQ doesn't exist in SSE[1-3]. +defm PSLLW : PDI_binop_rmi_int<0xF1, 0x71, MRM6r, "psllw", + int_x86_sse2_psll_w, int_x86_sse2_pslli_w>; +defm PSLLD : PDI_binop_rmi_int<0xF2, 0x72, MRM6r, "pslld", + int_x86_sse2_psll_d, int_x86_sse2_pslli_d>; +defm PSLLQ : PDI_binop_rmi_int<0xF3, 0x73, MRM6r, "psllq", + int_x86_sse2_psll_q, int_x86_sse2_pslli_q>; + +defm PSRLW : PDI_binop_rmi_int<0xD1, 0x71, MRM2r, "psrlw", + int_x86_sse2_psrl_w, int_x86_sse2_psrli_w>; +defm PSRLD : PDI_binop_rmi_int<0xD2, 0x72, MRM2r, "psrld", + int_x86_sse2_psrl_d, int_x86_sse2_psrli_d>; +defm PSRLQ : PDI_binop_rmi_int<0xD3, 0x72, MRM2r, "psrlq", + int_x86_sse2_psrl_q, int_x86_sse2_psrli_q>; + +defm PSRAW : PDI_binop_rmi_int<0xE1, 0x71, MRM4r, "psraw", + int_x86_sse2_psra_w, int_x86_sse2_psrai_w>; +defm PSRAD : PDI_binop_rmi_int<0xE2, 0x71, MRM4r, "psrad", + int_x86_sse2_psra_d, int_x86_sse2_psrai_d>; // 128-bit logical shifts. let Constraints = "$src1 = $dst", neverHasSideEffects = 1 in { |