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authorMichael Liao <michael.liao@intel.com>2013-03-26 22:47:01 +0000
committerMichael Liao <michael.liao@intel.com>2013-03-26 22:47:01 +0000
commitf8fd883fd368316ad3738dad6c15b1b8f3850f88 (patch)
tree948e0da9a0208da4b0a3284f7b9da08c29cdb3bd /lib/Target/X86/X86InstrInfo.td
parent0ca1a7f177ffd29c0af49f23cc7bd5f0b56a60d0 (diff)
Add XTEST codegen support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178083 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.td')
-rw-r--r--lib/Target/X86/X86InstrInfo.td1
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 95c7bdbc13..359c507d47 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -604,6 +604,7 @@ def HasBMI : Predicate<"Subtarget->hasBMI()">;
def HasBMI2 : Predicate<"Subtarget->hasBMI2()">;
def HasRTM : Predicate<"Subtarget->hasRTM()">;
def HasHLE : Predicate<"Subtarget->hasHLE()">;
+def HasTSX : Predicate<"Subtarget->hasRTM() || Subtarget->hasHLE()">;
def HasADX : Predicate<"Subtarget->hasADX()">;
def HasPRFCHW : Predicate<"Subtarget->hasPRFCHW()">;
def HasPrefetchW : Predicate<"Subtarget->has3DNow() || Subtarget->hasPRFCHW()">;