diff options
| author | Michael Liao <michael.liao@intel.com> | 2013-03-26 17:47:11 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2013-03-26 17:47:11 +0000 |
| commit | 675eb3b9ac547119f6db676ebdd172d40a797b1c (patch) | |
| tree | 4f13b3e2e5500e67183794bd4f1409ccd12b04d9 /lib/Target/X86/X86InstrInfo.td | |
| parent | 30ebb962b6fe110514917f31522a81f2c6d914ba (diff) | |
Add PREFETCHW codegen support
- Add 'PRFCHW' feature defined in AVX2 ISA extension
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178040 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.td')
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 39165e24a8..1add80b5ed 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -604,6 +604,8 @@ def HasBMI : Predicate<"Subtarget->hasBMI()">; def HasBMI2 : Predicate<"Subtarget->hasBMI2()">; def HasRTM : Predicate<"Subtarget->hasRTM()">; def HasADX : Predicate<"Subtarget->hasADX()">; +def HasPRFCHW : Predicate<"Subtarget->hasPRFCHW()">; +def HasPrefetchW : Predicate<"Subtarget->has3DNow() || Subtarget->hasPRFCHW()">; def FPStackf32 : Predicate<"!Subtarget->hasSSE1()">; def FPStackf64 : Predicate<"!Subtarget->hasSSE2()">; def HasCmpxchg16b: Predicate<"Subtarget->hasCmpxchg16b()">; |