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authorManman Ren <mren@apple.com>2012-06-26 19:47:59 +0000
committerManman Ren <mren@apple.com>2012-06-26 19:47:59 +0000
commit1f7a1b68a07ea6bdf521525a7928f4a8c5216713 (patch)
treeb575dce801938772f5cfd5bc9a8cbe5391474ccc /lib/Target/X86/X86InstrInfo.td
parentca578e7ba6b1e4ce955134e3fb1d5014942e5248 (diff)
X86: add GATHER intrinsics (AVX2) in LLVM
Support the following intrinsics: llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256 llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256 Modified Disassembler to handle VSIB addressing mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159221 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.td')
-rw-r--r--lib/Target/X86/X86InstrInfo.td8
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 9ce61409da..0023424e66 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -325,6 +325,14 @@ def f128mem : X86MemOperand<"printf128mem"> {
let ParserMatchClass = X86Mem128AsmOperand; }
def f256mem : X86MemOperand<"printf256mem">{
let ParserMatchClass = X86Mem256AsmOperand; }
+def v128mem : Operand<iPTR> {
+ let PrintMethod = "printf128mem";
+ let MIOperandInfo = (ops ptr_rc, i8imm, VR128, i32imm, i8imm);
+ let ParserMatchClass = X86Mem128AsmOperand; }
+def v256mem : Operand<iPTR> {
+ let PrintMethod = "printf256mem";
+ let MIOperandInfo = (ops ptr_rc, i8imm, VR256, i32imm, i8imm);
+ let ParserMatchClass = X86Mem256AsmOperand; }
}
// A version of i8mem for use on x86-64 that uses GR64_NOREX instead of