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authorBill Wendling <isanbard@gmail.com>2009-05-13 21:33:08 +0000
committerBill Wendling <isanbard@gmail.com>2009-05-13 21:33:08 +0000
commit587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4 (patch)
treef01732c9f02fd1154ac34176b7a5bbf1f5f0fc44 /lib/Target/X86/X86InstrBuilder.h
parent556d0a0d15689531f2b203575a3fe55e00713777 (diff)
Change MachineInstrBuilder::addReg() to take a flag instead of a list of
booleans. This gives a better indication of what the "addReg()" is doing. Remembering what all of those booleans mean isn't easy, especially if you aren't spending all of your time in that code. I took Jakob's suggestion and made it illegal to pass in "true" for the flag. This should hopefully prevent any unintended misuse of this (by reverting to the old way of using addReg()). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrBuilder.h')
-rw-r--r--lib/Target/X86/X86InstrBuilder.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h
index aa3e0333da..39504cd44c 100644
--- a/lib/Target/X86/X86InstrBuilder.h
+++ b/lib/Target/X86/X86InstrBuilder.h
@@ -83,13 +83,13 @@ inline const MachineInstrBuilder &addOffset(const MachineInstrBuilder &MIB,
inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
unsigned Reg, bool isKill,
int Offset) {
- return addOffset(MIB.addReg(Reg, false, false, isKill), Offset);
+ return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
}
inline const MachineInstrBuilder &addLeaRegOffset(const MachineInstrBuilder &MIB,
unsigned Reg, bool isKill,
int Offset) {
- return addLeaOffset(MIB.addReg(Reg, false, false, isKill), Offset);
+ return addLeaOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
}
/// addRegReg - This function is used to add a memory reference of the form:
@@ -97,8 +97,8 @@ inline const MachineInstrBuilder &addLeaRegOffset(const MachineInstrBuilder &MIB
inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB,
unsigned Reg1, bool isKill1,
unsigned Reg2, bool isKill2) {
- return MIB.addReg(Reg1, false, false, isKill1).addImm(1)
- .addReg(Reg2, false, false, isKill2).addImm(0);
+ return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1)
+ .addReg(Reg2, getKillRegState(isKill2)).addImm(0);
}
inline const MachineInstrBuilder &addLeaAddress(const MachineInstrBuilder &MIB,