diff options
| author | Michael Liao <michael.liao@intel.com> | 2013-02-25 23:16:36 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2013-02-25 23:16:36 +0000 |
| commit | d09318f9013aad79d7872de2ba490734b597f4d4 (patch) | |
| tree | eb907129df5c6857f3d510c269e88305683c40ff /lib/Target/X86/X86ISelLowering.cpp | |
| parent | 5e6e15caa79c30e155665e58b81540ec15e52051 (diff) | |
Refine fix to PR10499, no functionality change
- Put expensive checking after simple one
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176060 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 57014dd488..fb3352059a 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -5344,7 +5344,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const { // Vectors containing all ones can be matched by pcmpeqd on 128-bit width // vectors or broken into v4i32 operations on 256-bit vectors. AVX2 can use // vpcmpeqd on 256-bit vectors. - if (ISD::isBuildVectorAllOnes(Op.getNode()) && Subtarget->hasSSE2()) { + if (Subtarget->hasSSE2() && ISD::isBuildVectorAllOnes(Op.getNode())) { if (VT == MVT::v4i32 || (VT == MVT::v8i32 && Subtarget->hasInt256())) return Op; |