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authorBenjamin Kramer <benny.kra@googlemail.com>2012-12-25 13:09:08 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2012-12-25 13:09:08 +0000
commit99f78061e05833e815cb7a27e6c17eadcd028ce2 (patch)
treed6502369e0613e1de4916eef8f56870a3a651da5 /lib/Target/X86/X86ISelLowering.cpp
parent382ed78d3fef9f6c582e3cdcfb30f8c6fa3d0d79 (diff)
X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use of and commutativity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171064 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp10
1 files changed, 4 insertions, 6 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index a173712b5b..ad86c99fd2 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -9173,7 +9173,7 @@ SDValue X86TargetLowering::LowerVSETCC(SDValue Op, SelectionDAG &DAG) const {
return SDValue();
if (Opc == X86ISD::PCMPEQ && !Subtarget->hasSSE41()) {
// If pcmpeqq is missing but pcmpeqd is available synthesize pcmpeqq with
- // pcmpeqd + 2 shuffles + pand.
+ // pcmpeqd + pshufd + pand.
assert(Subtarget->hasSSE2() && !FlipSigns && "Don't know how to lower!");
// First cast everything to the right type,
@@ -9184,11 +9184,9 @@ SDValue X86TargetLowering::LowerVSETCC(SDValue Op, SelectionDAG &DAG) const {
SDValue Result = DAG.getNode(Opc, dl, MVT::v4i32, Op0, Op1);
// Make sure the lower and upper halves are both all-ones.
- const int Mask1[] = { 0, 0, 2, 2 };
- SDValue S1 = DAG.getVectorShuffle(MVT::v4i32, dl, Result, Result, Mask1);
- const int Mask2[] = { 1, 1, 3, 3 };
- SDValue S2 = DAG.getVectorShuffle(MVT::v4i32, dl, Result, Result, Mask2);
- Result = DAG.getNode(ISD::AND, dl, MVT::v4i32, S1, S2);
+ const int Mask[] = { 1, 0, 3, 2 };
+ SDValue Shuf = DAG.getVectorShuffle(MVT::v4i32, dl, Result, Result, Mask);
+ Result = DAG.getNode(ISD::AND, dl, MVT::v4i32, Result, Shuf);
if (Invert)
Result = DAG.getNOT(dl, Result, MVT::v4i32);