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author | Preston Gurd <preston.gurd@intel.com> | 2013-03-27 19:14:02 +0000 |
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committer | Preston Gurd <preston.gurd@intel.com> | 2013-03-27 19:14:02 +0000 |
commit | 1edadea42f6f5c393b4fdb9d7ce1cf7eb9c24ab4 (patch) | |
tree | 0703e20d41246fa36a72779d0d1ba5b58b6ee2d7 /lib/Target/X86/X86ISelLowering.cpp | |
parent | e915047fed99221afb8c540d8a7e81038a6483f1 (diff) |
For the current Atom processor, the fastest way to handle a call
indirect through a memory address is to load the memory address into
a register and then call indirect through the register.
This patch implements this improvement by modifying SelectionDAG to
force a function address which is a memory reference to be loaded
into a virtual register.
Patch by Sriram Murali.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178171 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 9ef6a3bca0..0eaab0f818 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -2629,6 +2629,19 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, InFlag = Chain.getValue(1); } + // Use indirect reference through register, when CALL uses a memory reference. + if (Subtarget->callRegIndirect() && + Callee.getOpcode() == ISD::LOAD) { + const TargetRegisterClass *AddrRegClass = + getRegClassFor(Subtarget->is64Bit() ? MVT::i64:MVT::i32); + MachineRegisterInfo &MRI = MF.getRegInfo(); + unsigned VReg = MRI.createVirtualRegister(AddrRegClass); + SDValue tempValue = DAG.getCopyFromReg(Callee, + dl, VReg, Callee.getValueType()); + Chain = DAG.getCopyToReg(Chain, dl, VReg, tempValue, InFlag); + InFlag = Chain.getValue(1); + } + Ops.push_back(Chain); Ops.push_back(Callee); |