diff options
| author | Dale Johannesen <dalej@apple.com> | 2008-11-13 21:52:36 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2008-11-13 21:52:36 +0000 |
| commit | 330169fa3e9c46c46bf130746d38e6ec2fac303a (patch) | |
| tree | cb0a421c8c7e743a5a1f73ae49903d667428ac2d /lib/Target/X86/X86ISelLowering.cpp | |
| parent | 704bff9e6cf0070924eb11d9e81e5ba6962ae4ef (diff) | |
Extend InlineAsm::C_Register to allow multiple specific registers
(actually, code already all worked, only the comment
changed). Use this to implement 'A' constraint on x86.
Fixes PR 1779.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59266 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 221f29fa72..2348191eba 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -7542,6 +7542,7 @@ X86TargetLowering::getConstraintType(const std::string &Constraint) const { if (Constraint.size() == 1) { switch (Constraint[0]) { case 'A': + return C_Register; case 'f': case 'r': case 'R': @@ -7671,10 +7672,6 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint, // FIXME: not handling fp-stack yet! switch (Constraint[0]) { // GCC X86 Constraint Letters default: break; // Unknown constraint letter - case 'A': // EAX/EDX - if (VT == MVT::i32 || VT == MVT::i64) - return make_vector<unsigned>(X86::EAX, X86::EDX, 0); - break; case 'q': // Q_REGS (GENERAL_REGS in 64-bit mode) case 'Q': // Q_REGS if (VT == MVT::i32) @@ -7762,7 +7759,11 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, Res.first = X86::ST0; Res.second = X86::RFP80RegisterClass; } - + // 'A' means EAX + EDX. + if (Constraint == "A") { + Res.first = X86::EAX; + Res.second = X86::GRADRegisterClass; + } return Res; } |