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authorBill Wendling <isanbard@gmail.com>2012-01-12 23:05:03 +0000
committerBill Wendling <isanbard@gmail.com>2012-01-12 23:05:03 +0000
commit86b1a7d61413aed40a68f98f1e8f17fd79ebd7a2 (patch)
treeb8bfa4798e70042333358b64cb79821da4103b9a /lib/Target/X86/X86FrameLowering.cpp
parentd578b905de8f9dece45aab2496a88ac548c67348 (diff)
Fix the code that was WRONG.
The registers are placed into the saved registers list in the reverse order, which is why the original loop was written to loop backwards. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148064 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86FrameLowering.cpp')
-rw-r--r--lib/Target/X86/X86FrameLowering.cpp19
1 files changed, 6 insertions, 13 deletions
diff --git a/lib/Target/X86/X86FrameLowering.cpp b/lib/Target/X86/X86FrameLowering.cpp
index e5f6752614..5dfc0bb85d 100644
--- a/lib/Target/X86/X86FrameLowering.cpp
+++ b/lib/Target/X86/X86FrameLowering.cpp
@@ -455,26 +455,19 @@ encodeCompactUnwindRegistersWithFrame(unsigned SavedRegs[CU_NUM_SAVED_REGS],
};
const unsigned *CURegs = (Is64Bit ? CU64BitRegs : CU32BitRegs);
- // FIXME: The code below is WRONG and breaks tests on i386, see
- // SingleSource/Regression/C++/EH/ctor_dtor_count.exec
- // SingleSource/Regression/C++/EH/exception_spec_test.exec
- // SingleSource/Regression/C++/EH/function_try_block.exec
- // SingleSource/Regression/C++/EH/throw_rethrow_test.exec
- return ~0U;
-
// Encode the registers in the order they were saved, 3-bits per register. The
- // registers are numbered from 1 to 6.
+ // registers are numbered from 1 to CU_NUM_SAVED_REGS.
uint32_t RegEnc = 0;
- for (int I = 0; I != 6; ++I) {
+ for (int I = CU_NUM_SAVED_REGS, Idx = 0; I != -1; --I) {
unsigned Reg = SavedRegs[I];
- if (Reg == 0) break;
+ if (Reg == 0) continue;
+
int CURegNum = getCompactUnwindRegNum(CURegs, Reg);
- if (CURegNum == -1)
- return ~0U;
+ if (CURegNum == -1) return ~0U;
// Encode the 3-bit register number in order, skipping over 3-bits for each
// register.
- RegEnc |= (CURegNum & 0x7) << ((5 - I) * 3);
+ RegEnc |= (CURegNum & 0x7) << (Idx++ * 3);
}
assert((RegEnc & 0x3FFFF) == RegEnc && "Invalid compact register encoding!");