diff options
| author | Joerg Sonnenberger <joerg@bec.de> | 2011-04-04 16:58:13 +0000 |
|---|---|---|
| committer | Joerg Sonnenberger <joerg@bec.de> | 2011-04-04 16:58:13 +0000 |
| commit | 4a8ac8de1ddfeaadb9ff13ce361bfc6435f18028 (patch) | |
| tree | 26398343e8cf8d6c9382cb7ce62fcb34a9396fa2 /lib/Target/X86/X86CodeEmitter.cpp | |
| parent | 39d7caea6938536e5528a76b28461000765a7556 (diff) | |
Add support for the VIA PadLock instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128826 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86CodeEmitter.cpp')
| -rw-r--r-- | lib/Target/X86/X86CodeEmitter.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index 60d9d4ad06..421e221d20 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -652,6 +652,8 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI, case X86II::TB: // Two-byte opcode prefix case X86II::T8: // 0F 38 case X86II::TA: // 0F 3A + case X86II::A6: // 0F A6 + case X86II::A7: // 0F A7 Need0FPrefix = true; break; case X86II::TF: // F2 0F 38 @@ -695,6 +697,12 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI, case X86II::TA: // 0F 3A MCE.emitByte(0x3A); break; + case X86II::A6: // 0F A6 + MCE.emitByte(0xA6); + break; + case X86II::A7: // 0F A7 + MCE.emitByte(0xA7); + break; } // If this is a two-address instruction, skip one of the register operands. |