diff options
| author | Craig Topper <craig.topper@gmail.com> | 2011-10-15 20:46:47 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2011-10-15 20:46:47 +0000 |
| commit | 566f233ba64c0bb2773b5717cb18753c7564f4b7 (patch) | |
| tree | befeba913e8cabb5cdec9d4aa59a6b9700178645 /lib/Target/X86/MCTargetDesc/X86BaseInfo.h | |
| parent | 4d83b79c76044e3f3cefd2a6c1b0b792266935c8 (diff) | |
Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work because these are the first VEX encoded instructions to use the reg field as an opcode extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142082 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/MCTargetDesc/X86BaseInfo.h')
| -rw-r--r-- | lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index e6ba705d4d..555ca17f42 100644 --- a/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -495,8 +495,13 @@ namespace X86II { case X86II::MRM0m: case X86II::MRM1m: case X86II::MRM2m: case X86II::MRM3m: case X86II::MRM4m: case X86II::MRM5m: - case X86II::MRM6m: case X86II::MRM7m: - return 0; + case X86II::MRM6m: case X86II::MRM7m: { + bool HasVEX_4V = (TSFlags >> X86II::VEXShift) & X86II::VEX_4V; + unsigned FirstMemOp = 0; + if (HasVEX_4V) + ++FirstMemOp;// Skip the register dest (which is encoded in VEX_VVVV). + return FirstMemOp; + } case X86II::MRM_C1: case X86II::MRM_C2: case X86II::MRM_C3: |