diff options
| author | Misha Brukman <brukman+llvm@gmail.com> | 2003-04-22 17:54:23 +0000 |
|---|---|---|
| committer | Misha Brukman <brukman+llvm@gmail.com> | 2003-04-22 17:54:23 +0000 |
| commit | baf0607cbc4457f66d43789f0500d8fa34ac1770 (patch) | |
| tree | 56bf9d3fc9daf0bf86764d0c12c8013d442d5bb0 /lib/Target/X86/InstSelectSimple.cpp | |
| parent | 59ee0eeffd650adee31ea1f67649a0ee59dd2330 (diff) | |
It's "necessary" to spell "necessarily" correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5833 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/InstSelectSimple.cpp')
| -rw-r--r-- | lib/Target/X86/InstSelectSimple.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index 6adccb15e8..5569708700 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -1209,7 +1209,7 @@ void ISel::EmitByteSwap(unsigned DestReg, unsigned SrcReg, unsigned Class) { // Emit the byte swap instruction... switch (Class) { case cByte: - // No byteswap neccesary for 8 bit value... + // No byteswap necessary for 8 bit value... BuildMI(BB, X86::MOVrr8, 1, DestReg).addReg(SrcReg); break; case cInt: @@ -1219,7 +1219,7 @@ void ISel::EmitByteSwap(unsigned DestReg, unsigned SrcReg, unsigned Class) { case cShort: // For 16 bit we have to use an xchg instruction, because there is no - // 16-bit bswap. XCHG is neccesarily not in SSA form, so we force things + // 16-bit bswap. XCHG is necessarily not in SSA form, so we force things // into AX to do the xchg. // BuildMI(BB, X86::MOVrr16, 1, X86::AX).addReg(SrcReg); |