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authorDan Gohman <gohman@apple.com>2007-06-19 01:48:05 +0000
committerDan Gohman <gohman@apple.com>2007-06-19 01:48:05 +0000
commit82a87a01723c095176c6940bcc63d3a7c8007b4b (patch)
treecb6bdf78002b48d594f2803783ba8c3d361d8a01 /lib/Target/Target.td
parenteaa91b0a1fc68984aae51f3c4b0cf29b38f89dac (diff)
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to identify rematerializable instructions. Some instructions are only rematerializable with specific operands, such as loads from constant pools, while others are always rematerializable. This hook allows both to be identified as being rematerializable with the same mechanism. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Target.td')
-rw-r--r--lib/Target/Target.td1
1 files changed, 0 insertions, 1 deletions
diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 43e3af8667..2258199ddf 100644
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -186,7 +186,6 @@ class Instruction {
bit isConvertibleToThreeAddress = 0; // Can this 2-addr instruction promote?
bit isCommutable = 0; // Is this 3 operand instruction commutable?
bit isTerminator = 0; // Is this part of the terminator for a basic block?
- bit isReMaterializable = 0; // Is this instruction re-materializable?
bit isPredicable = 0; // Is this instruction predicable?
bit hasDelaySlot = 0; // Does this instruction have an delay slot?
bit usesCustomDAGSchedInserter = 0; // Pseudo instr needing special help.