Eliminate tabs and trailing spaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22520 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 1249 insertions, 1249 deletions

diff --git a/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp b/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp
index 01af03db66..a9a6b6b770 100644
--- a/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp
+++ b/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp
@@ -74,11 +74,11 @@ namespace llvm {
   Statistic<> NumSB("moduloschedSB-numSuperBlocks", "Total Number of SuperBlocks");
   Statistic<> BBWithCalls("modulosched-BBCalls", "Basic Blocks rejected due to calls");
   Statistic<> BBWithCondMov("modulosched-loopCondMov", 
-			    "Basic Blocks rejected due to conditional moves");
+                            "Basic Blocks rejected due to conditional moves");
   Statistic<> SBResourceConstraint("modulosched-resourceConstraint", 
-				 "Loops constrained by resources");
+                                 "Loops constrained by resources");
   Statistic<> SBRecurrenceConstraint("modulosched-recurrenceConstraint", 
-				   "Loops constrained by recurrences");
+                                   "Loops constrained by recurrences");
   Statistic<> SBFinalIISum("modulosched-finalIISum", "Sum of all final II");
   Statistic<> SBIISum("modulosched-IISum", "Sum of all theoretical II");
   Statistic<> SBMSLoops("modulosched-schedLoops", "Number of loops successfully modulo-scheduled");
@@ -97,42 +97,42 @@ namespace llvm {
 
     static std::string getNodeLabel(MSchedGraphSBNode *Node, MSchedGraphSB *Graph) {
       if(!Node->isPredicate()) {
-	if (Node->getInst()) {
-	  std::stringstream ss;
-	  ss << *(Node->getInst());
-	  return ss.str(); //((MachineInstr*)Node->getInst());
-	}
-	else
-	  return "No Inst";
+        if (Node->getInst()) {
+          std::stringstream ss;
+          ss << *(Node->getInst());
+          return ss.str(); //((MachineInstr*)Node->getInst());
+        }
+        else
+          return "No Inst";
       }
       else
-	return "Pred Node";
+        return "Pred Node";
     }
     static std::string getEdgeSourceLabel(MSchedGraphSBNode *Node,
-					  MSchedGraphSBNode::succ_iterator I) {
+                                          MSchedGraphSBNode::succ_iterator I) {
       //Label each edge with the type of dependence
       std::string edgelabel = "";
       switch (I.getEdge().getDepOrderType()) {
-	
+        
       case MSchedGraphSBEdge::TrueDep:
-	edgelabel = "True";
-	break;
+        edgelabel = "True";
+        break;
 
       case MSchedGraphSBEdge::AntiDep:
-	edgelabel =  "Anti";
-	break;
-	
+        edgelabel =  "Anti";
+        break;
+        
       case MSchedGraphSBEdge::OutputDep:
-	edgelabel = "Output";
-	break;
-	
+        edgelabel = "Output";
+        break;
+        
       case MSchedGraphSBEdge::NonDataDep:
-	edgelabel = "Pred";
-	break;
+        edgelabel = "Pred";
+        break;
 
       default:
-	edgelabel = "Unknown";
-	break;
+        edgelabel = "Unknown";
+        break;
       }
 
       //FIXME
@@ -165,22 +165,22 @@ namespace llvm {
     
     //Loop over worklist and ModuloSchedule each SuperBlock
     for(std::vector<std::vector<const MachineBasicBlock*> >::iterator SB = Worklist.begin(),
-	  SBE = Worklist.end(); SB != SBE; ++SB) {
+          SBE = Worklist.end(); SB != SBE; ++SB) {
       
       //Print out Superblock
       DEBUG(std::cerr << "ModuloScheduling SB: \n";
-	    for(std::vector<const MachineBasicBlock*>::const_iterator BI = SB->begin(), 
-		  BE = SB->end(); BI != BE; ++BI) {
-	      (*BI)->print(std::cerr);});
+            for(std::vector<const MachineBasicBlock*>::const_iterator BI = SB->begin(), 
+                  BE = SB->end(); BI != BE; ++BI) {
+              (*BI)->print(std::cerr);});
       
       if(!CreateDefMap(*SB)) {
-	defaultInst = 0;
-	defMap.clear();
-	continue;
+        defaultInst = 0;
+        defMap.clear();
+        continue;
       }
 
       MSchedGraphSB *MSG = new MSchedGraphSB(*SB, target, indVarInstrs[*SB], DA, 
-					 machineTollvm[*SB]);
+                                         machineTollvm[*SB]);
 
       //Write Graph out to file
       DEBUG(WriteGraphToFileSB(std::cerr, F.getName(), MSG));
@@ -195,9 +195,9 @@ namespace llvm {
       
       //Our starting initiation interval is the maximum of RecMII and ResMII
       if(RecMII < ResMII)
-	++SBRecurrenceConstraint;
+        ++SBRecurrenceConstraint;
       else
-	++SBResourceConstraint;
+        ++SBResourceConstraint;
       
       II = std::max(RecMII, ResMII);
       int mII = II;
@@ -211,11 +211,11 @@ namespace llvm {
       
       //Dump node properties if in debug mode
       DEBUG(for(std::map<MSchedGraphSBNode*, MSNodeSBAttributes>::iterator I =  nodeToAttributesMap.begin(),
-		  E = nodeToAttributesMap.end(); I !=E; ++I) {
-	      std::cerr << "Node: " << *(I->first) << " ASAP: " << I->second.ASAP << " ALAP: "
-			<< I->second.ALAP << " MOB: " << I->second.MOB << " Depth: " << I->second.depth
-			<< " Height: " << I->second.height << "\n";
-	    });
+                  E = nodeToAttributesMap.end(); I !=E; ++I) {
+              std::cerr << "Node: " << *(I->first) << " ASAP: " << I->second.ASAP << " ALAP: "
+                        << I->second.ALAP << " MOB: " << I->second.MOB << " Depth: " << I->second.depth
+                        << " Height: " << I->second.height << "\n";
+            });
       
 
       //Put nodes in order to schedule them
@@ -223,19 +223,19 @@ namespace llvm {
  
       //Dump out partial order
       DEBUG(for(std::vector<std::set<MSchedGraphSBNode*> >::iterator I = partialOrder.begin(),
-		  E = partialOrder.end(); I !=E; ++I) {
-	      std::cerr << "Start set in PO\n";
-	      for(std::set<MSchedGraphSBNode*>::iterator J = I->begin(), JE = I->end(); J != JE; ++J)
-		std::cerr << "PO:" << **J << "\n";
-	    });
+                  E = partialOrder.end(); I !=E; ++I) {
+              std::cerr << "Start set in PO\n";
+              for(std::set<MSchedGraphSBNode*>::iterator J = I->begin(), JE = I->end(); J != JE; ++J)
+                std::cerr << "PO:" << **J << "\n";
+            });
 
       //Place nodes in final order
       orderNodes();
       
       //Dump out order of nodes
       DEBUG(for(std::vector<MSchedGraphSBNode*>::iterator I = FinalNodeOrder.begin(), E = FinalNodeOrder.end(); I != E; ++I) {
-	      std::cerr << "FO:" << **I << "\n";
-	    });
+              std::cerr << "FO:" << **I << "\n";
+            });
       
 
       //Finally schedule nodes
@@ -247,18 +247,18 @@ namespace llvm {
       //Final scheduling step is to reconstruct the loop only if we actual have
       //stage > 0
       if(haveSched) {
-	//schedule.printSchedule(std::cerr);
-	reconstructLoop(*SB);
-	++SBMSLoops;
-	//Changed = true;
-	SBIISum += mII;
-	SBFinalIISum += II;
-	
+        //schedule.printSchedule(std::cerr);
+        reconstructLoop(*SB);
+        ++SBMSLoops;
+        //Changed = true;
+        SBIISum += mII;
+        SBFinalIISum += II;
+        
       if(schedule.getMaxStage() == 0)
-	++SBSameStage;
+        ++SBSameStage;
       }
       else
-	++SBNoSched;
+        ++SBNoSched;
       
       //Clear out our maps for the next basic block that is processed
       nodeToAttributesMap.clear();
@@ -273,7 +273,7 @@ namespace llvm {
   }
 
   void ModuloSchedulingSBPass::FindSuperBlocks(Function &F, LoopInfo &LI,
-		      std::vector<std::vector<const MachineBasicBlock*> > &Worklist) {
+                      std::vector<std::vector<const MachineBasicBlock*> > &Worklist) {
 
     //Get MachineFunction
     MachineFunction &MF = MachineFunction::get(&F);
@@ -294,95 +294,95 @@ namespace llvm {
 
       //If loop is not single entry, try the next one
       if(!L->getLoopPreheader())
-	continue;
+        continue;
     
       //Check size of this loop, we don't want SBB loops
       if(L->getBlocks().size() == 1)
-	continue;
+        continue;
       
       //Check if this loop contains no sub loops
       if(L->getSubLoops().size() == 0) {
-	
-	std::vector<const MachineBasicBlock*> superBlock;
-	
-	//Get Loop Headers
-	BasicBlock *header = L->getHeader();
-
-	//Follow the header and make sure each BB only has one entry and is valid
-	BasicBlock *current = header;
-	assert(bbMap.count(current) && "LLVM BB must have corresponding Machine BB\n");
-	MachineBasicBlock *currentMBB = bbMap[header];
-	bool done = false;
-	bool success = true;
-	unsigned offset = 0;
-	std::map<const MachineInstr*, unsigned> indexMap;
-
-	while(!done) {
-	  //Loop over successors of this BB, they should be in the
-	  //loop block and be valid
-	  BasicBlock *next = 0;
-	  for(succ_iterator I = succ_begin(current), E = succ_end(current);
-	      I != E; ++I) {
-	    if(L->contains(*I)) {
-	      if(!next) 
-		next = *I;
-	      else {
-		done = true;
-		success = false;
-		break;
-	      }
-	    }
-	  }
-	   
-	  if(success) {
-	    superBlock.push_back(currentMBB);
-	    if(next == header)
-	      done = true;
-	    else if(!next->getSinglePredecessor()) {
-	      done = true;
-	      success = false;
-	    }
-	    else {
-	      //Check that the next BB only has one entry
-	      current = next;
-	      assert(bbMap.count(current) && "LLVM BB must have corresponding Machine BB");
-	      currentMBB = bbMap[current];
-	    }
-	  }
-	}
-
-
-	  
-
-
-	if(success) {
-	  ++NumSB;
-
-	  //Loop over all the blocks in the superblock
-	  for(std::vector<const MachineBasicBlock*>::iterator currentMBB = superBlock.begin(), MBBEnd = superBlock.end(); currentMBB != MBBEnd; ++currentMBB) {
-	    if(!MachineBBisValid(*currentMBB, indexMap, offset)) {
-	      success = false;
-	      break;
-	    }
-	  }
-	}
-	
-	if(success) {
-	  if(getIndVar(superBlock, bbMap, indexMap)) {
-	    ++SBValid;
-	    Worklist.push_back(superBlock);
-	    SBSize += superBlock.size();
-	  }
-	  else
-	    ++SBInvalid;
-	}
+        
+        std::vector<const MachineBasicBlock*> superBlock;
+        
+        //Get Loop Headers
+        BasicBlock *header = L->getHeader();
+
+        //Follow the header and make sure each BB only has one entry and is valid
+        BasicBlock *current = header;
+        assert(bbMap.count(current) && "LLVM BB must have corresponding Machine BB\n");
+        MachineBasicBlock *currentMBB = bbMap[header];
+        bool done = false;
+        bool success = true;
+        unsigned offset = 0;
+        std::map<const MachineInstr*, unsigned> indexMap;
+
+        while(!done) {
+          //Loop over successors of this BB, they should be in the
+          //loop block and be valid
+          BasicBlock *next = 0;
+          for(succ_iterator I = succ_begin(current), E = succ_end(current);
+              I != E; ++I) {
+            if(L->contains(*I)) {
+              if(!next) 
+                next = *I;
+              else {
+                done = true;
+                success = false;
+                break;
+              }
+            }
+          }
+           
+          if(success) {
+            superBlock.push_back(currentMBB);
+            if(next == header)
+              done = true;
+            else if(!next->getSinglePredecessor()) {
+              done = true;
+              success = false;
+            }
+            else {
+              //Check that the next BB only has one entry
+              current = next;
+              assert(bbMap.count(current) && "LLVM BB must have corresponding Machine BB");
+              currentMBB = bbMap[current];
+            }
+          }
+        }
+
+
+          
+
+
+        if(success) {
+          ++NumSB;
+
+          //Loop over all the blocks in the superblock
+          for(std::vector<const MachineBasicBlock*>::iterator currentMBB = superBlock.begin(), MBBEnd = superBlock.end(); currentMBB != MBBEnd; ++currentMBB) {
+            if(!MachineBBisValid(*currentMBB, indexMap, offset)) {
+              success = false;
+              break;
+            }
+          }
+        }
+        
+        if(success) {
+          if(getIndVar(superBlock, bbMap, indexMap)) {
+            ++SBValid;
+            Worklist.push_back(superBlock);
+            SBSize += superBlock.size();
+          }
+          else
+            ++SBInvalid;
+        }
       }
     }
   }
   
   
   bool ModuloSchedulingSBPass::getIndVar(std::vector<const MachineBasicBlock*> &superBlock, std::map<BasicBlock*, MachineBasicBlock*> &bbMap, 
-				  std::map<const MachineInstr*, unsigned> &indexMap) {
+                                  std::map<const MachineInstr*, unsigned> &indexMap) {
     //See if we can get induction var instructions
     std::set<const BasicBlock*> llvmSuperBlock;
 
@@ -409,14 +409,14 @@ namespace llvm {
       indVar.insert(b);
     
       if(Instruction *I = dyn_cast<Instruction>(cond))
-	if(bbMap.count(I->getParent())) {
-	  if (!assocIndVar(I, indVar, stack, bbMap, superBlock[(superBlock.size()-1)]->getBasicBlock(), llvmSuperBlock))
-	    return false;
-	}
-	else
-	  return false;
+        if(bbMap.count(I->getParent())) {
+          if (!assocIndVar(I, indVar, stack, bbMap, superBlock[(superBlock.size()-1)]->getBasicBlock(), llvmSuperBlock))
+            return false;
+        }
+        else
+          return false;
       else
-	return false;
+        return false;
     }
     else {
       indVar.insert(b);
@@ -424,43 +424,43 @@ namespace llvm {
 
     //Dump out instructions associate with indvar for debug reasons
     DEBUG(for(std::set<Instruction*>::iterator N = indVar.begin(), NE = indVar.end(); 
-	      N != NE; ++N) {
-	    std::cerr << **N << "\n";
-	  });
+              N != NE; ++N) {
+            std::cerr << **N << "\n";
+          });
     
     //Create map of machine instr to llvm instr
     std::map<MachineInstr*, Instruction*> mllvm;
     for(std::vector<const MachineBasicBlock*>::iterator MBB = superBlock.begin(), MBE = superBlock.end(); MBB != MBE; ++MBB) {
       BasicBlock *BB = (BasicBlock*) (*MBB)->getBasicBlock();
       for(BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) {
-	MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(I);
-	for (unsigned j = 0; j < tempMvec.size(); j++) {
-	  mllvm[tempMvec[j]] = I;
-	}
+        MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(I);
+        for (unsigned j = 0; j < tempMvec.size(); j++) {
+          mllvm[tempMvec[j]] = I;
+        }
       }
     }
 
       //Convert list of LLVM Instructions to list of Machine instructions
       std::map<const MachineInstr*, unsigned> mIndVar;
       for(std::set<Instruction*>::iterator N = indVar.begin(), 
-	    NE = indVar.end(); N != NE; ++N) {
-	      
-	//If we have a load, we can't handle this loop because
-	//there is no way to preserve dependences between loads
-	//and stores
-	if(isa<LoadInst>(*N))
-	  return false;
-
-	MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(*N);
-	for (unsigned j = 0; j < tempMvec.size(); j++) {
-	  MachineOpCode OC = (tempMvec[j])->getOpcode();
-	  if(TMI->isNop(OC))
-	    continue;
-	  if(!indexMap.count(tempMvec[j]))
-	    continue;
-	  mIndVar[(MachineInstr*) tempMvec[j]] = indexMap[(MachineInstr*) tempMvec[j]];
-	  DEBUG(std::cerr << *(tempMvec[j]) << " at index " << indexMap[(MachineInstr*) tempMvec[j]] << "\n");
-	}
+            NE = indVar.end(); N != NE; ++N) {
+              
+        //If we have a load, we can't handle this loop because
+        //there is no way to preserve dependences between loads
+        //and stores
+        if(isa<LoadInst>(*N))
+          return false;
+
+        MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(*N);
+        for (unsigned j = 0; j < tempMvec.size(); j++) {
+          MachineOpCode OC = (tempMvec[j])->getOpcode();
+          if(TMI->isNop(OC))
+            continue;
+          if(!indexMap.count(tempMvec[j]))
+            continue;
+          mIndVar[(MachineInstr*) tempMvec[j]] = indexMap[(MachineInstr*) tempMvec[j]];
+          DEBUG(std::cerr << *(tempMvec[j]) << " at index " << indexMap[(MachineInstr*) tempMvec[j]] << "\n");
+        }
       }
       
       //Put into a map for future access
@@ -472,38 +472,38 @@ namespace llvm {
   }
 
   bool ModuloSchedulingSBPass::assocIndVar(Instruction *I, 
-					   std::set<Instruction*> &indVar,
-					   std::vector<Instruction*> &stack, 
-				       std::map<BasicBlock*, MachineBasicBlock*> &bbMap, 
-					   const BasicBlock *last, std::set<const BasicBlock*> &llvmSuperBlock) {
+                                           std::set<Instruction*> &indVar,
+                                           std::vector<Instruction*> &stack, 
+                                       std::map<BasicBlock*, MachineBasicBlock*> &bbMap, 
+                                           const BasicBlock *last, std::set<const BasicBlock*> &llvmSuperBlock) {
 
     stack.push_back(I);
     
     //If this is a phi node, check if its the canonical indvar
     if(PHINode *PN = dyn_cast<PHINode>(I)) {
       if(llvmSuperBlock.count(PN->getParent())) {
-	if (Instruction *Inc =
-	    dyn_cast<Instruction>(PN->getIncomingValueForBlock(last)))
-	  if (Inc->getOpcode() == Instruction::Add && Inc->getOperand(0) == PN)
-	    if (ConstantInt *CI = dyn_cast<ConstantInt>(Inc->getOperand(1)))
-	      if (CI->equalsInt(1)) {
-		//We have found the indvar, so add the stack, and inc instruction to the set
-		indVar.insert(stack.begin(), stack.end());
-		indVar.insert(Inc);
-		stack.pop_back();
-		return true;
-	      }
-	return false;
+        if (Instruction *Inc =
+            dyn_cast<Instruction>(PN->getIncomingValueForBlock(last)))
+          if (Inc->getOpcode() == Instruction::Add && Inc->getOperand(0) == PN)
+            if (ConstantInt *CI = dyn_cast<ConstantInt>(Inc->getOperand(1)))
+              if (CI->equalsInt(1)) {
+                //We have found the indvar, so add the stack, and inc instruction to the set
+                indVar.insert(stack.begin(), stack.end());
+                indVar.insert(Inc);
+                stack.pop_back();
+                return true;
+              }
+        return false;
       }
     }
     else {
       //Loop over each of the instructions operands, check if they are an instruction and in this BB
       for(unsigned i = 0; i < I->getNumOperands(); ++i) {
-	if(Instruction *N =  dyn_cast<Instruction>(I->getOperand(i))) {
-	  if(bbMap.count(N->getParent()))
-	    if(!assocIndVar(N, indVar, stack, bbMap, last, llvmSuperBlock))
-	      return false;
-	}
+        if(Instruction *N =  dyn_cast<Instruction>(I->getOperand(i))) {
+          if(bbMap.count(N->getParent()))
+            if(!assocIndVar(N, indVar, stack, bbMap, last, llvmSuperBlock))
+              return false;
+        }
       }
     }
     
@@ -517,8 +517,8 @@ namespace llvm {
   /// calls) in the block.  Currently ModuloScheduling only works on
   /// single basic block loops.
   bool ModuloSchedulingSBPass::MachineBBisValid(const MachineBasicBlock *BI,     
-			std::map<const MachineInstr*, unsigned> &indexMap, 
-						unsigned &offset) {
+                        std::map<const MachineInstr*, unsigned> &indexMap, 
+                                                unsigned &offset) {
     
     //Check size of our basic block.. make sure we have more then just the terminator in it
     if(BI->getBasicBlock()->size() == 1)
@@ -534,26 +534,26 @@ namespace llvm {
 
       //Look for calls
       if(TMI->isCall(OC)) {
-	++BBWithCalls;
-	return false;
+        ++BBWithCalls;
+        return false;
       }
     
       //Look for conditional move
       if(OC == V9::MOVRZr || OC == V9::MOVRZi || OC == V9::MOVRLEZr || OC == V9::MOVRLEZi
-	 || OC == V9::MOVRLZr || OC == V9::MOVRLZi || OC == V9::MOVRNZr || OC == V9::MOVRNZi
-	 || OC == V9::MOVRGZr || OC == V9::MOVRGZi || OC == V9::MOVRGEZr
-	 || OC == V9::MOVRGEZi || OC == V9::MOVLEr || OC == V9::MOVLEi || OC == V9::MOVLEUr
-	 || OC == V9::MOVLEUi || OC == V9::MOVFLEr || OC == V9::MOVFLEi
-	 || OC == V9::MOVNEr || OC == V9::MOVNEi || OC == V9::MOVNEGr || OC == V9::MOVNEGi
-	 || OC == V9::MOVFNEr || OC == V9::MOVFNEi) {
-	++BBWithCondMov;
-	return false;
+         || OC == V9::MOVRLZr || OC == V9::MOVRLZi || OC == V9::MOVRNZr || OC == V9::MOVRNZi
+         || OC == V9::MOVRGZr || OC == V9::MOVRGZi || OC == V9::MOVRGEZr
+         || OC == V9::MOVRGEZi || OC == V9::MOVLEr || OC == V9::MOVLEi || OC == V9::MOVLEUr
+         || OC == V9::MOVLEUi || OC == V9::MOVFLEr || OC == V9::MOVFLEi
+         || OC == V9::MOVNEr || OC == V9::MOVNEi || OC == V9::MOVNEGr || OC == V9::MOVNEGi
+         || OC == V9::MOVFNEr || OC == V9::MOVFNEi) {
+        ++BBWithCondMov;
+        return false;
       }
 
       indexMap[I] = count + offset;
 
       if(TMI->isNop(OC))
-	continue;
+        continue;
 
       ++count;
     }
@@ -568,30 +568,30 @@ bool ModuloSchedulingSBPass::CreateDefMap(std::vector<const MachineBasicBlock*>
   defaultInst = 0;
 
   for(std::vector<const MachineBasicBlock*>::iterator BI = SB.begin(), 
-	BE = SB.end(); BI != BE; ++BI) {
+        BE = SB.end(); BI != BE; ++BI) {
 
     for(MachineBasicBlock::const_iterator I = (*BI)->begin(), E = (*BI)->end(); I != E; ++I) {
       for(unsigned opNum = 0; opNum < I->getNumOperands(); ++opNum) {
-	const MachineOperand &mOp = I->getOperand(opNum);
-	if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) {
-	  Value *V = mOp.getVRegValue();
-	  //assert if this is the second def we have seen
-	  if(defMap.count(V) && isa<PHINode>(V))
-	    DEBUG(std::cerr << "FIXME: Dup def for phi!\n");
-	  else {
-	    //assert(!defMap.count(V) && "Def already in the map");
-	    if(defMap.count(V))
-	      return false;
-	    defMap[V] = (MachineInstr*) &*I;
-	  }
-	}
-	
-	//See if we can use this Value* as our defaultInst
-	if(!defaultInst && mOp.getType() == MachineOperand::MO_VirtualRegister) {
-	  Value *V = mOp.getVRegValue();
-	  if(!isa<TmpInstruction>(V) && !isa<Argument>(V) && !isa<Constant>(V) && !isa<PHINode>(V))
-	    defaultInst = (Instruction*) V;
-	}
+        const MachineOperand &mOp = I->getOperand(opNum);
+        if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) {
+          Value *V = mOp.getVRegValue();
+          //assert if this is the second def we have seen
+          if(defMap.count(V) && isa<PHINode>(V))
+            DEBUG(std::cerr << "FIXME: Dup def for phi!\n");
+          else {
+            //assert(!defMap.count(V) && "Def already in the map");
+            if(defMap.count(V))
+              return false;
+            defMap[V] = (MachineInstr*) &*I;
+          }
+        }
+        
+        //See if we can use this Value* as our defaultInst
+        if(!defaultInst && mOp.getType() == MachineOperand::MO_VirtualRegister) {
+          Value *V = mOp.getVRegValue();
+          if(!isa<TmpInstruction>(V) && !isa<Argument>(V) && !isa<Constant>(V) && !isa<PHINode>(V))
+            defaultInst = (Instruction*) V;
+        }
       }
     }
   }
@@ -629,14 +629,14 @@ int ModuloSchedulingSBPass::calculateResMII(std::vector<const MachineBasicBlock*
 
       //Loop over resources in each cycle and increments their usage count
       for(unsigned i=0; i < resources.size(); ++i)
-	for(unsigned j=0; j < resources[i].size(); ++j) {
-	  if(!resourceUsageCount.count(resources[i][j])) {
-	    resourceUsageCount[resources[i][j]] = 1;
-	  }
-	  else {
-	    resourceUsageCount[resources[i][j]] =  resourceUsageCount[resources[i][j]] + 1;
-	  }
-	}
+        for(unsigned j=0; j < resources[i].size(); ++j) {
+          if(!resourceUsageCount.count(resources[i][j])) {
+            resourceUsageCount[resources[i][j]] = 1;
+          }
+          else {
+            resourceUsageCount[resources[i][j]] =  resourceUsageCount[resources[i][j]] + 1;
+          }
+        }
     }
   }
 
@@ -692,7 +692,7 @@ int ModuloSchedulingSBPass::calculateRecMII(MSchedGraphSB *graph, int MII) {
 int CircCountSB;
 
 void ModuloSchedulingSBPass::unblock(MSchedGraphSBNode *u, std::set<MSchedGraphSBNode*> &blocked,
-	     std::map<MSchedGraphSBNode*, std::set<MSchedGraphSBNode*> > &B) {
+             std::map<MSchedGraphSBNode*, std::set<MSchedGraphSBNode*> > &B) {
 
   //Unblock u
   DEBUG(std::cerr << "Unblocking: " << *u << "\n");
@@ -726,13 +726,13 @@ void ModuloSchedulingSBPass::addSCC(std::vector<MSchedGraphSBNode*> &SCC, std::m
     for(unsigned i = 0; i < (*N)->succ_size(); ++i) {
       MSchedGraphSBEdge *edge = (*N)->getSuccessor(i);
       if(find(SCC.begin(), SCC.end(), edge->getDest()) != SCC.end()) {
-	totalDistance += edge->getIteDiff();
-	if(edge->getIteDiff() > 0)
-	  if(!start && !end) {
-	    start = *N;
-	    end = edge->getDest();
-	  }
-	    
+        totalDistance += edge->getIteDiff();
+        if(edge->getIteDiff() > 0)
+          if(!start && !end) {
+            start = *N;
+            end = edge->getDest();
+          }
+            
       }
     }
 
@@ -748,7 +748,7 @@ void ModuloSchedulingSBPass::addSCC(std::vector<MSchedGraphSBNode*> &SCC, std::m
 
   assert( (start && end) && "Must have start and end node to ignore edge for SCC");
 
-  if(start && end) {	
+  if(start && end) {    
     //Insert reccurrence into the list
     DEBUG(std::cerr << "Ignore Edge from!!: " << *start << " to " << *end << "\n");
     edgesToIgnore.insert(std::make_pair(newNodes[start], (newNodes[end])->getInEdgeNum(newNodes[start])));
@@ -762,9 +762,9 @@ void ModuloSchedulingSBPass::addSCC(std::vector<MSchedGraphSBNode*> &SCC, std::m
 }
 
 bool ModuloSchedulingSBPass::circuit(MSchedGraphSBNode *v, std::vector<MSchedGraphSBNode*> &stack,
-	     std::set<MSchedGraphSBNode*> &blocked, std::vector<MSchedGraphSBNode*> &SCC,
-	     MSchedGraphSBNode *s, std::map<MSchedGraphSBNode*, std::set<MSchedGraphSBNode*> > &B,
-				   int II, std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes) {
+             std::set<MSchedGraphSBNode*> &blocked, std::vector<MSchedGraphSBNode*> &SCC,
+             MSchedGraphSBNode *s, std::map<MSchedGraphSBNode*, std::set<MSchedGraphSBNode*> > &B,
+                                   int II, std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes) {
   bool f = false;
 
   DEBUG(std::cerr << "Finding Circuits Starting with: ( " << v << ")"<< *v << "\n");
@@ -791,7 +791,7 @@ bool ModuloSchedulingSBPass::circuit(MSchedGraphSBNode *v, std::vector<MSchedGra
     }
     else if(!blocked.count(*I)) {
       if(circuit(*I, stack, blocked, SCC, s, B, II, newNodes))
-	f = true;
+        f = true;
     }
     else
       DEBUG(std::cerr << "Blocked: " << **I << "\n");
@@ -818,7 +818,7 @@ void ModuloSchedulingSBPass::addRecc(std::vector<MSchedGraphSBNode*> &stack, std
   std::vector<MSchedGraphSBNode*> recc;
   //Dump recurrence for now
   DEBUG(std::cerr << "Starting Recc\n");
-	
+        
   int totalDelay = 0;
   int totalDistance = 0;
   MSchedGraphSBNode *lastN = 0;
@@ -834,8 +834,8 @@ void ModuloSchedulingSBPass::addRecc(std::vector<MSchedGraphSBNode*> &stack, std
       totalDistance += iteDiff;
 
       if(iteDiff > 0) {
-	start = lastN;
-	end = *N;
+        start = lastN;
+        end = *N;
       }
     }
     //Get the original node
@@ -851,7 +851,7 @@ void ModuloSchedulingSBPass::addRecc(std::vector<MSchedGraphSBNode*> &stack, std
   DEBUG(std::cerr << "End Recc\n");
   CircCountSB++;
 
-  if(start && end) {	
+  if(start && end) {    
     //Insert reccurrence into the list
     DEBUG(std::cerr << "Ignore Edge from!!: " << *start << " to " << *end << "\n");
     edgesToIgnore.insert(std::make_pair(newNodes[start], (newNodes[end])->getInEdgeNum(newNodes[start])));
@@ -867,7 +867,7 @@ void ModuloSchedulingSBPass::addRecc(std::vector<MSchedGraphSBNode*> &stack, std
   int value = totalDelay-(RecMII * totalDistance);
   int lastII = II;
   while(value < 0) {
-	  
+          
     lastII = RecMII;
     RecMII--;
     value = totalDelay-(RecMII * totalDistance);
@@ -921,64 +921,64 @@ void ModuloSchedulingSBPass::findAllCircuits(MSchedGraphSB *g, int II) {
     //Find scc with the least vertex
     for (MSchedGraphSB::iterator GI = MSG->begin(), E = MSG->end(); GI != E; ++GI)
       if (Visited.insert(GI->second).second) {
-	for (scc_iterator<MSchedGraphSBNode*> SCCI = scc_begin(GI->second),
-	       E = scc_end(GI->second); SCCI != E; ++SCCI) {
-	  std::vector<MSchedGraphSBNode*> &nextSCC = *SCCI;
-
-	  if (Visited.insert(nextSCC[0]).second) {
-	    Visited.insert(nextSCC.begin()+1, nextSCC.end());
-
-	    if(nextSCC.size() > 1) {
-	      DEBUG(std::cerr << "SCC size: " << nextSCC.size() << "\n");
-	      
-	      for(unsigned i = 0; i < nextSCC.size(); ++i) {
-		//Loop over successor and see if in scc, then count edge
-		MSchedGraphSBNode *node = nextSCC[i];
-		for(MSchedGraphSBNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; ++S) {
-		  if(find(nextSCC.begin(), nextSCC.end(), *S) != nextSCC.end())
-		    numEdges++;
-		}
-	      }
-	      DEBUG(std::cerr << "Num Edges: " << numEdges << "\n");
-	    }
-	    
-	    //Ignore self loops
-	    if(nextSCC.size() > 1) {
-
-	      //Get least vertex in Vk
-	      if(!s) {
-		s = nextSCC[0];
-		Vk = nextSCC;
-	      }
-
-	      for(unsigned i = 0; i < nextSCC.size(); ++i) {
-		if(nextSCC[i] < s) {
-		  s = nextSCC[i];
-		  Vk = nextSCC;
-		}
-	      }
-	    }
-	  }
-	}
+        for (scc_iterator<MSchedGraphSBNode*> SCCI = scc_begin(GI->second),
+               E = scc_end(GI->second); SCCI != E; ++SCCI) {
+          std::vector<MSchedGraphSBNode*> &nextSCC = *SCCI;
+
+          if (Visited.insert(nextSCC[0]).second) {
+            Visited.insert(nextSCC.begin()+1, nextSCC.end());
+
+            if(nextSCC.size() > 1) {
+              DEBUG(std::cerr << "SCC size: " << nextSCC.size() << "\n");
+              
+              for(unsigned i = 0; i < nextSCC.size(); ++i) {
+                //Loop over successor and see if in scc, then count edge
+                MSchedGraphSBNode *node = nextSCC[i];
+                for(MSchedGraphSBNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; ++S) {
+                  if(find(nextSCC.begin(), nextSCC.end(), *S) != nextSCC.end())
+                    numEdges++;
+                }
+              }
+              DEBUG(std::cerr << "Num Edges: " << numEdges << "\n");
+            }
+            
+            //Ignore self loops
+            if(nextSCC.size() > 1) {
+
+              //Get least vertex in Vk
+              if(!s) {
+                s = nextSCC[0];
+                Vk = nextSCC;
+              }
+
+              for(unsigned i = 0; i < nextSCC.size(); ++i) {
+                if(nextSCC[i] < s) {
+                  s = nextSCC[i];
+                  Vk = nextSCC;
+                }
+              }
+            }
+          }
+        }
       }
 
 
 
     //Process SCC
     DEBUG(for(std::vector<MSchedGraphSBNode*>::iterator N = Vk.begin(), NE = Vk.end();
-	      N != NE; ++N) { std::cerr << *((*N)->getInst()); });
+              N != NE; ++N) { std::cerr << *((*N)->getInst()); });
 
     //Iterate over all nodes in this scc
     for(std::vector<MSchedGraphSBNode*>::iterator N = Vk.begin(), NE = Vk.end();
-	N != NE; ++N) {
+        N != NE; ++N) {
       blocked.erase(*N);
       B[*N].clear();
     }
     if(Vk.size() > 1) {
       if(numEdges < 98)
-	circuit(s, stack, blocked, Vk, s, B, II, newNodes);
+        circuit(s, stack, blocked, Vk, s, B, II, newNodes);
       else
-	addSCC(Vk, newNodes);
+        addSCC(Vk, newNodes);
 
 
       //Delete nodes from the graph
@@ -986,12 +986,12 @@ void ModuloSchedulingSBPass::findAllCircuits(MSchedGraphSB *g, int II) {
       std::vector<MSchedGraphSBNode*> nodesToRemove;
       nodesToRemove.push_back(s);
       for(MSchedGraphSB::iterator N = MSG->begin(), NE = MSG->end(); N != NE; ++N) {
-	if(N->second < s )
-	    nodesToRemove.push_back(N->second);
+        if(N->second < s )
+            nodesToRemove.push_back(N->second);
       }
       for(std::vector<MSchedGraphSBNode*>::iterator N = nodesToRemove.begin(), NE = nodesToRemove.end(); N != NE; ++N) {
-	DEBUG(std::cerr << "Deleting Node: " << **N << "\n");
-	MSG->deleteNode(*N);
+        DEBUG(std::cerr << "Deleting Node: " << **N << "\n");
+        MSG->deleteNode(*N);
       }
     }
     else
@@ -1015,7 +1015,7 @@ void ModuloSchedulingSBPass::calculateNodeAttributes(MSchedGraphSB *graph, int M
 
     //Assert if its already in the map
     assert(nodeToAttributesMap.count(I->second) == 0 &&
-	   "Node attributes are already in the map");
+           "Node attributes are already in the map");
 
     //Put into the map with default attribute values
     nodeToAttributesMap[I->second] = MSNodeSBAttributes();
@@ -1101,7 +1101,7 @@ int  ModuloSchedulingSBPass::calculateASAP(MSchedGraphSBNode *node, int MII, MSc
 
 
 int ModuloSchedulingSBPass::calculateALAP(MSchedGraphSBNode *node, int MII,
-					int maxASAP, MSchedGraphSBNode *srcNode) {
+                                        int maxASAP, MSchedGraphSBNode *srcNode) {
 
   DEBUG(std::cerr << "Calculating ALAP for " << *node << "\n");
 
@@ -1122,28 +1122,28 @@ int ModuloSchedulingSBPass::calculateALAP(MSchedGraphSBNode *node, int MII,
 
     //Iterate over all of the predecessors and fine max
     for(MSchedGraphSBNode::succ_iterator P = node->succ_begin(),
-	  E = node->succ_end(); P != E; ++P) {
+          E = node->succ_end(); P != E; ++P) {
 
       //Only process if we are not ignoring the edge
       if(!ignoreEdge(node, *P)) {
-	processedOneEdge = true;
-	int succALAP = -1;
-	succALAP = calculateALAP(*P, MII, maxASAP, node);
-	
-	assert(succALAP != -1 && "Successors ALAP should have been caclulated");
-	
-	int iteDiff = P.getEdge().getIteDiff();
-	
-	int currentSuccValue = succALAP - node->getLatency() + iteDiff * MII;
-	
-	DEBUG(s