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authorVikram S. Adve <vadve@cs.uiuc.edu>2001-09-30 23:37:26 +0000
committerVikram S. Adve <vadve@cs.uiuc.edu>2001-09-30 23:37:26 +0000
commit4a87b38ba9ce13fd24d469a36360e947c01c12c9 (patch)
treea3c32c68f552f73d2b98f7fcb19676da45b27773 /lib/Target/SparcV9/InstrSched/SchedGraph.h
parent5316f8fa2f2714e243f2dea787025f01f6750d07 (diff)
Minor changes for bug fixes in SchedGraph.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@677 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SparcV9/InstrSched/SchedGraph.h')
-rw-r--r--lib/Target/SparcV9/InstrSched/SchedGraph.h24
1 files changed, 15 insertions, 9 deletions
diff --git a/lib/Target/SparcV9/InstrSched/SchedGraph.h b/lib/Target/SparcV9/InstrSched/SchedGraph.h
index ef3b4df862..76a7663cf8 100644
--- a/lib/Target/SparcV9/InstrSched/SchedGraph.h
+++ b/lib/Target/SparcV9/InstrSched/SchedGraph.h
@@ -33,7 +33,7 @@ class TargetMachine;
class SchedGraphEdge;
class SchedGraphNode;
class SchedGraph;
-class NodeToRegRefMap;
+class RegToRefVecMap;
class MachineInstr;
/******************** Exported Data Types and Constants ********************/
@@ -61,9 +61,9 @@ protected:
int minDelay; // cached latency (assumes fixed target arch)
union {
- Value* val;
- int machineRegNum;
- ResourceId resourceId;
+ const Value* val;
+ int machineRegNum;
+ ResourceId resourceId;
};
public:
@@ -79,7 +79,7 @@ public:
// constructor for explicit def-use or memory def-use edge
/*ctor*/ SchedGraphEdge(SchedGraphNode* _src,
SchedGraphNode* _sink,
- Value* _val,
+ const Value* _val,
DataDepOrderType _depOrderType =TrueDep,
int _minDelay = -1);
@@ -293,8 +293,11 @@ private:
//
void buildGraph (const TargetMachine& target);
- void addEdgesForInstruction (SchedGraphNode* node,
- NodeToRegRefMap& regToRefVecMap,
+ void buildNodesforVMInstr (const TargetMachine& target,
+ const Instruction* instr);
+
+ void addEdgesForInstruction (const MachineInstr& minstr,
+ RegToRefVecMap& regToRefVecMap,
const TargetMachine& target);
void addCDEdges (const TerminatorInst* term,
@@ -303,11 +306,14 @@ private:
void addMemEdges (const vector<const Instruction*>& memVec,
const TargetMachine& target);
- void addMachineRegEdges (NodeToRegRefMap& regToRefVecMap,
+ void addMachineRegEdges (RegToRefVecMap& regToRefVecMap,
const TargetMachine& target);
void addSSAEdge (SchedGraphNode* node,
- Value* val,
+ const Value* val,
+ const TargetMachine& target);
+
+ void addNonSSAEdgesForValue (const Instruction* instr,
const TargetMachine& target);
void addDummyEdges ();