Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 11 insertions, 11 deletions

diff --git a/lib/Target/Sparc/SparcAsmPrinter.cpp b/lib/Target/Sparc/SparcAsmPrinter.cpp
index 3a9716757b..0753b74135 100644
--- a/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -152,7 +152,7 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
     break;
 
   case MachineOperand::MO_Immediate:
-    O << (int)MO.getImmedValue();
+    O << (int)MO.getImm();
     break;
   case MachineOperand::MO_MachineBasicBlock:
     printBasicBlockLabel(MO.getMachineBasicBlock());
@@ -188,7 +188,7 @@ void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
       MI->getOperand(opNum+1).getReg() == SP::G0)
     return;   // don't print "+%g0"
   if (MI->getOperand(opNum+1).isImmediate() &&
-      MI->getOperand(opNum+1).getImmedValue() == 0)
+      MI->getOperand(opNum+1).getImm() == 0)
     return;   // don't print "+0"
   
   O << "+";
@@ -203,7 +203,7 @@ void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
 }
 
 void SparcAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum) {
-  int CC = (int)MI->getOperand(opNum).getImmedValue();
+  int CC = (int)MI->getOperand(opNum).getImm();
   O << SPARCCondCodeToString((SPCC::CondCodes)CC);
 }
 
diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index 59eb209868..040bcd5432 100644
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -912,7 +912,7 @@ SparcTargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
     break;
   }
 
-  CC = (SPCC::CondCodes)MI->getOperand(3).getImmedValue();
+  CC = (SPCC::CondCodes)MI->getOperand(3).getImm();
   
   // To "insert" a SELECT_CC instruction, we actually have to insert the diamond
   // control-flow pattern.  The incoming instruction knows the destination vreg
diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp
index 765d648f56..2672389372 100644
--- a/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -24,7 +24,7 @@ SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST)
 }
 
 static bool isZeroImm(const MachineOperand &op) {
-  return op.isImmediate() && op.getImmedValue() == 0;
+  return op.isImmediate() && op.getImm() == 0;
 }
 
 /// Return true if the instruction is a register to register move and
@@ -71,7 +71,7 @@ unsigned SparcInstrInfo::isLoadFromStackSlot(MachineInstr *MI,
       MI->getOpcode() == SP::LDFri ||
       MI->getOpcode() == SP::LDDFri) {
     if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() &&
-        MI->getOperand(2).getImmedValue() == 0) {
+        MI->getOperand(2).getImm() == 0) {
       FrameIndex = MI->getOperand(1).getFrameIndex();
       return MI->getOperand(0).getReg();
     }
@@ -90,7 +90,7 @@ unsigned SparcInstrInfo::isStoreToStackSlot(MachineInstr *MI,
       MI->getOpcode() == SP::STFri ||
       MI->getOpcode() == SP::STDFri) {
     if (MI->getOperand(0).isFrameIndex() && MI->getOperand(1).isImmediate() &&
-        MI->getOperand(1).getImmedValue() == 0) {
+        MI->getOperand(1).getImm() == 0) {
       FrameIndex = MI->getOperand(0).getFrameIndex();
       return MI->getOperand(2).getReg();
     }
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp
index dcc614bcf6..aaf6fa5f50 100644
--- a/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -68,7 +68,7 @@ void SparcRegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
     if (MO.isRegister())
       MIB.addReg(MO.getReg());
     else if (MO.isImmediate())
-      MIB.addImm(MO.getImmedValue());
+      MIB.addImm(MO.getImm());
     else
       MIB.addFrameIndex(MO.getFrameIndex());
   }
@@ -110,7 +110,7 @@ void SparcRegisterInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
     if (MO.isRegister())
       MIB.addReg(MO.getReg());
     else if (MO.isImmediate())
-      MIB.addImm(MO.getImmedValue());
+      MIB.addImm(MO.getImm());
     else
       MIB.addFrameIndex(MO.getFrameIndex());
   }
@@ -222,7 +222,7 @@ void SparcRegisterInfo::
 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
                               MachineBasicBlock::iterator I) const {
   MachineInstr &MI = *I;
-  int Size = MI.getOperand(0).getImmedValue();
+  int Size = MI.getOperand(0).getImm();
   if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
     Size = -Size;
   if (Size)
@@ -246,7 +246,7 @@ void SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
   // Addressable stack objects are accessed using neg. offsets from %fp
   MachineFunction &MF = *MI.getParent()->getParent();
   int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
-               MI.getOperand(i+1).getImmedValue();
+               MI.getOperand(i+1).getImm();
 
   // Replace frame index with a frame pointer reference.
   if (Offset >= -4096 && Offset <= 4095) {