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authorChris Lattner <sabre@nondot.org>2005-12-17 23:05:35 +0000
committerChris Lattner <sabre@nondot.org>2005-12-17 23:05:35 +0000
commit558bfe0cf5392d7f8d48647ed1d88fd0f530c4c3 (patch)
tree412ec40df8e903319cb3d52e5800658599f61cfd /lib/Target/Sparc
parentd19fc65345c773af2e82a6e5227e4b020aab7d4c (diff)
Give patterns to F3_3 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24800 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc')
-rw-r--r--lib/Target/Sparc/SparcInstrFormats.td3
-rw-r--r--lib/Target/Sparc/SparcInstrInfo.td40
2 files changed, 22 insertions, 21 deletions
diff --git a/lib/Target/Sparc/SparcInstrFormats.td b/lib/Target/Sparc/SparcInstrFormats.td
index ace4a9c6b5..fcaa3ae157 100644
--- a/lib/Target/Sparc/SparcInstrFormats.td
+++ b/lib/Target/Sparc/SparcInstrFormats.td
@@ -97,11 +97,12 @@ class F3_2<bits<2> opVal, bits<6> op3val, dag ops,
// floating-point
class F3_3<bits<2> opVal, bits<6> op3val, bits<9> opfval, dag ops,
- string asmstr> : F3 {
+ string asmstr, list<dag> pattern> : F3 {
bits<5> rs2;
dag OperandList = ops;
let AsmString = asmstr;
+ let Pattern = pattern;
let op = opVal;
let op3 = op3val;
diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td
index ca9126a744..d33ba1ac33 100644
--- a/lib/Target/Sparc/SparcInstrInfo.td
+++ b/lib/Target/Sparc/SparcInstrInfo.td
@@ -485,68 +485,68 @@ def WRYri : F3_2<2, 0b110000,
// Convert Integer to Floating-point Instructions, p. 141
def FITOS : F3_3<2, 0b110100, 0b011000100,
(ops FPRegs:$dst, FPRegs:$src),
- "fitos $src, $dst">;
+ "fitos $src, $dst", []>;
def FITOD : F3_3<2, 0b110100, 0b011001000,
(ops DFPRegs:$dst, DFPRegs:$src),
- "fitod $src, $dst">;
+ "fitod $src, $dst", []>;
// Convert Floating-point to Integer Instructions, p. 142
def FSTOI : F3_3<2, 0b110100, 0b011010001,
(ops FPRegs:$dst, FPRegs:$src),
- "fstoi $src, $dst">;
+ "fstoi $src, $dst", []>;
def FDTOI : F3_3<2, 0b110100, 0b011010010,
(ops DFPRegs:$dst, DFPRegs:$src),
- "fdtoi $src, $dst">;
+ "fdtoi $src, $dst", []>;
// Convert between Floating-point Formats Instructions, p. 143
def FSTOD : F3_3<2, 0b110100, 0b011001001,
(ops DFPRegs:$dst, FPRegs:$src),
- "fstod $src, $dst">;
+ "fstod $src, $dst", []>;
def FDTOS : F3_3<2, 0b110100, 0b011000110,
(ops FPRegs:$dst, DFPRegs:$src),
- "fdtos $src, $dst">;
+ "fdtos $src, $dst", []>;
// Floating-point Move Instructions, p. 144
def FMOVS : F3_3<2, 0b110100, 0b000000001,
(ops FPRegs:$dst, FPRegs:$src),
- "fmovs $src, $dst">;
+ "fmovs $src, $dst", []>;
def FNEGS : F3_3<2, 0b110100, 0b000000101,
(ops FPRegs:$dst, FPRegs:$src),
- "fnegs $src, $dst">;
+ "fnegs $src, $dst", []>;
def FABSS : F3_3<2, 0b110100, 0b000001001,
(ops FPRegs:$dst, FPRegs:$src),
- "fabss $src, $dst">;
+ "fabss $src, $dst", []>;
// Floating-point Add and Subtract Instructions, p. 146
def FADDS : F3_3<2, 0b110100, 0b001000001,
(ops FPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
- "fadds $src1, $src2, $dst">;
+ "fadds $src1, $src2, $dst", []>;
def FADDD : F3_3<2, 0b110100, 0b001000010,
(ops DFPRegs:$dst, DFPRegs:$src1, DFPRegs:$src2),
- "faddd $src1, $src2, $dst">;
+ "faddd $src1, $src2, $dst", []>;
def FSUBS : F3_3<2, 0b110100, 0b001000101,
(ops FPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
- "fsubs $src1, $src2, $dst">;
+ "fsubs $src1, $src2, $dst", []>;
def FSUBD : F3_3<2, 0b110100, 0b001000110,
(ops DFPRegs:$dst, DFPRegs:$src1, DFPRegs:$src2),
- "fsubd $src1, $src2, $dst">;
+ "fsubd $src1, $src2, $dst", []>;
// Floating-point Multiply and Divide Instructions, p. 147
def FMULS : F3_3<2, 0b110100, 0b001001001,
(ops FPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
- "fmuls $src1, $src2, $dst">;
+ "fmuls $src1, $src2, $dst", []>;
def FMULD : F3_3<2, 0b110100, 0b001001010,
(ops DFPRegs:$dst, DFPRegs:$src1, DFPRegs:$src2),
- "fmuld $src1, $src2, $dst">;
+ "fmuld $src1, $src2, $dst", []>;
def FSMULD : F3_3<2, 0b110100, 0b001101001,
(ops DFPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
- "fsmuld $src1, $src2, $dst">;
+ "fsmuld $src1, $src2, $dst", []>;
def FDIVS : F3_3<2, 0b110100, 0b001001101,
(ops FPRegs:$dst, FPRegs:$src1, FPRegs:$src2),
- "fdivs $src1, $src2, $dst">;
+ "fdivs $src1, $src2, $dst", []>;
def FDIVD : F3_3<2, 0b110100, 0b001001110,
(ops DFPRegs:$dst, DFPRegs:$src1, DFPRegs:$src2),
- "fdivd $src1, $src2, $dst">;
+ "fdivd $src1, $src2, $dst", []>;
// Floating-point Compare Instructions, p. 148
// Note: the 2nd template arg is different for these guys.
@@ -555,10 +555,10 @@ def FDIVD : F3_3<2, 0b110100, 0b001001110,
// is modelled with a forced noop after the instruction.
def FCMPS : F3_3<2, 0b110101, 0b001010001,
(ops FPRegs:$src1, FPRegs:$src2),
- "fcmps $src1, $src2\n\tnop">;
+ "fcmps $src1, $src2\n\tnop", []>;
def FCMPD : F3_3<2, 0b110101, 0b001010010,
(ops DFPRegs:$src1, DFPRegs:$src2),
- "fcmpd $src1, $src2\n\tnop">;
+ "fcmpd $src1, $src2\n\tnop", []>;
//===----------------------------------------------------------------------===//
// Non-Instruction Patterns