diff options
author | Chris Lattner <sabre@nondot.org> | 2004-08-15 22:15:11 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2004-08-15 22:15:11 +0000 |
commit | 01d0efba3982e98e2dc7bc534406fbf9fd1af137 (patch) | |
tree | 1e8354ce9f36afcfc0f9c723365a8ad15c7486ea /lib/Target/Sparc | |
parent | 078fee3f2e62d50f6c38fdb4e0f6aefaf385963d (diff) |
Code insertion methods now return void instead of an int.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15780 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc')
-rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.cpp | 17 | ||||
-rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.h | 18 |
2 files changed, 16 insertions, 19 deletions
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp index ef4d1781d0..5e371bd87a 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -25,7 +25,7 @@ SparcV8RegisterInfo::SparcV8RegisterInfo() : SparcV8GenRegisterInfo(V8::ADJCALLSTACKDOWN, V8::ADJCALLSTACKUP) {} -int SparcV8RegisterInfo:: +void SparcV8RegisterInfo:: storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, int FrameIdx) const { const TargetRegisterClass *RC = getRegClass(SrcReg); @@ -42,10 +42,9 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, .addReg (SrcReg); else assert (0 && "Can't store this register to stack slot"); - return 1; } -int SparcV8RegisterInfo:: +void SparcV8RegisterInfo:: loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FrameIdx) const { const TargetRegisterClass *RC = getRegClass(DestReg); @@ -58,21 +57,19 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, BuildMI (MBB, I, V8::LDDFri, 2, DestReg).addFrameIndex (FrameIdx) .addSImm (0); else - assert (0 && "Can't load this register from stack slot"); - return 1; + assert(0 && "Can't load this register from stack slot"); } -int SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator I, - unsigned DestReg, unsigned SrcReg, - const TargetRegisterClass *RC) const { +void SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB, + MachineBasicBlock::iterator I, + unsigned DestReg, unsigned SrcReg, + const TargetRegisterClass *RC) const { if (RC == SparcV8::IntRegsRegisterClass) BuildMI (MBB, I, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg); else if (RC == SparcV8::FPRegsRegisterClass) BuildMI (MBB, I, V8::FMOVS, 1, DestReg).addReg (SrcReg); else assert (0 && "Can't copy this register"); - return 1; } void SparcV8RegisterInfo:: diff --git a/lib/Target/Sparc/SparcRegisterInfo.h b/lib/Target/Sparc/SparcRegisterInfo.h index e4dcaccf2c..b53202edaf 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.h +++ b/lib/Target/Sparc/SparcRegisterInfo.h @@ -26,17 +26,17 @@ struct SparcV8RegisterInfo : public SparcV8GenRegisterInfo { const TargetRegisterClass* getRegClassForType(const Type* Ty) const; /// Code Generation virtual methods... - int storeRegToStackSlot(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MBBI, - unsigned SrcReg, int FrameIndex) const; - - int loadRegFromStackSlot(MachineBasicBlock &MBB, + void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned DestReg, int FrameIndex) const; + unsigned SrcReg, int FrameIndex) const; + + void loadRegFromStackSlot(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, + unsigned DestReg, int FrameIndex) const; - int copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned DestReg, unsigned SrcReg, - const TargetRegisterClass *RC) const; + void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, + unsigned DestReg, unsigned SrcReg, + const TargetRegisterClass *RC) const; void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, |