diff options
author | Evan Cheng <evan.cheng@apple.com> | 2011-11-16 08:38:26 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2011-11-16 08:38:26 +0000 |
commit | b95fc31aa2e5a0a0b9ee1909d1cb949577c5aa16 (patch) | |
tree | a891fa0a8cb7d5f75446fc0f0346eb55b18a715c /lib/Target/Sparc/SparcTargetMachine.cpp | |
parent | f1b41dd38d2b2713e3870f384525b020bbac05f6 (diff) |
Sink codegen optimization level into MCCodeGenInfo along side relocation model
and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcTargetMachine.cpp')
-rw-r--r-- | lib/Target/Sparc/SparcTargetMachine.cpp | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp index 3d7b4a47d1..7dff79941d 100644 --- a/lib/Target/Sparc/SparcTargetMachine.cpp +++ b/lib/Target/Sparc/SparcTargetMachine.cpp @@ -27,16 +27,16 @@ extern "C" void LLVMInitializeSparcTarget() { SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL, bool is64bit) - : LLVMTargetMachine(T, TT, CPU, FS, RM, CM), + : LLVMTargetMachine(T, TT, CPU, FS, RM, CM, OL), Subtarget(TT, CPU, FS, is64bit), DataLayout(Subtarget.getDataLayout()), TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget), FrameLowering(Subtarget) { } -bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, - CodeGenOpt::Level OptLevel) { +bool SparcTargetMachine::addInstSelector(PassManagerBase &PM) { PM.add(createSparcISelDag(*this)); return false; } @@ -44,8 +44,7 @@ bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, /// addPreEmitPass - This pass may be implemented by targets that want to run /// passes immediately before machine code is emitted. This should return /// true if -print-machineinstrs should print out the code after the passes. -bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, - CodeGenOpt::Level OptLevel){ +bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM){ PM.add(createSparcFPMoverPass(*this)); PM.add(createSparcDelaySlotFillerPass(*this)); return true; @@ -54,13 +53,15 @@ bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, SparcV8TargetMachine::SparcV8TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, - CodeModel::Model CM) - : SparcTargetMachine(T, TT, CPU, FS, RM, CM, false) { + CodeModel::Model CM, + CodeGenOpt::Level OL) + : SparcTargetMachine(T, TT, CPU, FS, RM, CM, OL, false) { } SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, - CodeModel::Model CM) - : SparcTargetMachine(T, TT, CPU, FS, RM, CM, true) { + CodeModel::Model CM, + CodeGenOpt::Level OL) + : SparcTargetMachine(T, TT, CPU, FS, RM, CM, OL, true) { } |