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| author | Chris Lattner <sabre@nondot.org> | 2006-08-17 22:00:08 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-08-17 22:00:08 +0000 |
| commit | 5ea64fd9eb0027ad20a66ea29211eef79d8842a0 (patch) | |
| tree | cf7e23de8d8fbe6719bf9f2371aacbda97de7827 /lib/Target/Sparc/SparcRegisterInfo.td | |
| parent | c0431fe1ca52c5d159c604957f337aa3eb1ec3d3 (diff) | |
Constify some methods. Patch provided by Anton Vayvod, thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29756 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcRegisterInfo.td')
| -rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Sparc/SparcRegisterInfo.td b/lib/Target/Sparc/SparcRegisterInfo.td index b9bf1bd75b..11251e9258 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.td +++ b/lib/Target/Sparc/SparcRegisterInfo.td @@ -138,11 +138,11 @@ def IntRegs : RegisterClass<"SP", [i32], 32, [L0, L1, L2, L3, L4, L5, L6, L7, G5, G6, G7 // reserved for kernel ]> { let MethodProtos = [{ - iterator allocation_order_end(MachineFunction &MF) const; + iterator allocation_order_end(const MachineFunction &MF) const; }]; let MethodBodies = [{ IntRegsClass::iterator - IntRegsClass::allocation_order_end(MachineFunction &MF) const { + IntRegsClass::allocation_order_end(const MachineFunction &MF) const { // FIXME: These special regs should be taken out of the regclass! return end()-10 // Don't allocate special registers -1; // FIXME: G1 reserved for large imm generation by frame code. |