diff options
author | Evan Cheng <evan.cheng@apple.com> | 2007-12-05 03:14:33 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-12-05 03:14:33 +0000 |
commit | d64b5c82b97ad1b74eb9fd2f23257a7899b0c307 (patch) | |
tree | 833ba21d24aa346a057bf617a4b89ce36d9ae304 /lib/Target/Sparc/SparcRegisterInfo.cpp | |
parent | f89a22a3d1d98b8507433acf0cec7640e6da0088 (diff) |
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
the stored register is killed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44600 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcRegisterInfo.cpp')
-rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.cpp | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp index fcd0dfcca2..dc2f9e89ff 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -32,23 +32,24 @@ SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st, void SparcRegisterInfo:: storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, - unsigned SrcReg, int FI, + unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC) const { // On the order of operands here: think "[FrameIdx + 0] = SrcReg". if (RC == SP::IntRegsRegisterClass) BuildMI(MBB, I, TII.get(SP::STri)).addFrameIndex(FI).addImm(0) - .addReg(SrcReg, false, false, true); + .addReg(SrcReg, false, false, isKill); else if (RC == SP::FPRegsRegisterClass) BuildMI(MBB, I, TII.get(SP::STFri)).addFrameIndex(FI).addImm(0) - .addReg(SrcReg, false, false, true); + .addReg(SrcReg, false, false, isKill); else if (RC == SP::DFPRegsRegisterClass) BuildMI(MBB, I, TII.get(SP::STDFri)).addFrameIndex(FI).addImm(0) - .addReg(SrcReg, false, false, true); + .addReg(SrcReg, false, false, isKill); else assert(0 && "Can't store this register to stack slot"); } void SparcRegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, + bool isKill, SmallVectorImpl<MachineOperand> &Addr, const TargetRegisterClass *RC, SmallVectorImpl<MachineInstr*> &NewMIs) const { @@ -71,7 +72,7 @@ void SparcRegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, else MIB.addFrameIndex(MO.getFrameIndex()); } - MIB.addReg(SrcReg, false, false, true); + MIB.addReg(SrcReg, false, false, isKill); NewMIs.push_back(MIB); return; } |