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authorChris Lattner <sabre@nondot.org>2011-05-22 18:28:46 +0000
committerChris Lattner <sabre@nondot.org>2011-05-22 18:28:46 +0000
commit87943e36989bd7ac03647004272fe054191e19e7 (patch)
tree767657143ae65056b7294e429c05b0a903554289 /lib/Target/README.txt
parent6c9b8d3d411b0ee65263dc41d2b953fe118cf31e (diff)
add a note.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131863 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/README.txt')
-rw-r--r--lib/Target/README.txt10
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/Target/README.txt b/lib/Target/README.txt
index 0105ae4562..260cb5ccab 100644
--- a/lib/Target/README.txt
+++ b/lib/Target/README.txt
@@ -2346,3 +2346,13 @@ Note that bb1 and bb2 are the same. This doesn't happen at the IR level
because one call is passing an i32 and the other is passing an i64.
//===---------------------------------------------------------------------===//
+
+I see this sort of pattern in 176.gcc in a few places (e.g. the start of
+store_bit_field). The rem should be replaced with a multiply and subtract:
+
+ %3 = sdiv i32 %A, %B
+ %4 = srem i32 %A, %B
+
+Similarly for udiv/urem.
+
+//===---------------------------------------------------------------------===//