diff options
author | Vincent Lejeune <vljn@ovi.com> | 2013-03-14 15:50:45 +0000 |
---|---|---|
committer | Vincent Lejeune <vljn@ovi.com> | 2013-03-14 15:50:45 +0000 |
commit | 3ab0ba3cd8a499ebcc7eda3d7585c5ab4e7f0711 (patch) | |
tree | 70ac157dcdb996383fc937da79194988f85e1c52 /lib/Target/R600/R600MachineScheduler.h | |
parent | b4ba5e68e1ac00bfb93572a1f271673deefd7ea9 (diff) |
R600: Factorize code handling Const Read Port limitation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177078 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/R600MachineScheduler.h')
-rw-r--r-- | lib/Target/R600/R600MachineScheduler.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/Target/R600/R600MachineScheduler.h b/lib/Target/R600/R600MachineScheduler.h index d74ff1e076..3d0367fd8e 100644 --- a/lib/Target/R600/R600MachineScheduler.h +++ b/lib/Target/R600/R600MachineScheduler.h @@ -98,7 +98,7 @@ public: virtual void releaseBottomNode(SUnit *SU); private: - SUnit *InstructionsGroupCandidate[4]; + std::vector<MachineInstr *> InstructionsGroupCandidate; int getInstKind(SUnit *SU); bool regBelongsToClass(unsigned Reg, const TargetRegisterClass *RC) const; @@ -112,7 +112,6 @@ private: void AssignSlot(MachineInstr *MI, unsigned Slot); SUnit* pickAlu(); SUnit* pickOther(int QID); - bool isBundleable(const MachineInstr& MI); void MoveUnits(ReadyQueue *QSrc, ReadyQueue *QDst); }; |