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authorTom Stellard <thomas.stellard@amd.com>2012-12-19 22:10:31 +0000
committerTom Stellard <thomas.stellard@amd.com>2012-12-19 22:10:31 +0000
commit6b7d99d47321ebb478b22afd2e317fe89d2149db (patch)
tree548126753462b8985bf846b022d39b2c51e96f96 /lib/Target/R600/AMDGPUTargetMachine.cpp
parent6eebe47060eec7e3a4ae95d4b4835869108f9c07 (diff)
R600: New control flow for SI v2
This patch replaces the control flow handling with a new pass which structurize the graph before transforming it to machine instruction. This has a couple of different advantages and currently fixes 20 piglit tests without a single regression. It is now a general purpose transformation that could be not only be used for SI/R6xx, but also for other hardware implementations that use a form of structurized control flow. v2: further cleanup, fixes and documentation Patch by: Christian König Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170591 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/AMDGPUTargetMachine.cpp')
-rw-r--r--lib/Target/R600/AMDGPUTargetMachine.cpp13
1 files changed, 7 insertions, 6 deletions
diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/R600/AMDGPUTargetMachine.cpp
index 98a3064f7e..d09dc2efff 100644
--- a/lib/Target/R600/AMDGPUTargetMachine.cpp
+++ b/lib/Target/R600/AMDGPUTargetMachine.cpp
@@ -91,6 +91,11 @@ TargetPassConfig *AMDGPUTargetMachine::createPassConfig(PassManagerBase &PM) {
bool
AMDGPUPassConfig::addPreISel() {
+ const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
+ if (ST.device()->getGeneration() > AMDGPUDeviceInfo::HD6XXX) {
+ addPass(createAMDGPUStructurizeCFGPass());
+ addPass(createSIAnnotateControlFlowPass());
+ }
return false;
}
@@ -107,9 +112,6 @@ bool AMDGPUPassConfig::addPreRegAlloc() {
addPass(createSIAssignInterpRegsPass(*TM));
}
addPass(createAMDGPUConvertToISAPass(*TM));
- if (ST.device()->getGeneration() > AMDGPUDeviceInfo::HD6XXX) {
- addPass(createSIFixSGPRLivenessPass(*TM));
- }
return false;
}
@@ -124,11 +126,10 @@ bool AMDGPUPassConfig::addPreSched2() {
}
bool AMDGPUPassConfig::addPreEmitPass() {
- addPass(createAMDGPUCFGPreparationPass(*TM));
- addPass(createAMDGPUCFGStructurizerPass(*TM));
-
const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
+ addPass(createAMDGPUCFGPreparationPass(*TM));
+ addPass(createAMDGPUCFGStructurizerPass(*TM));
addPass(createR600ExpandSpecialInstrsPass(*TM));
addPass(&FinalizeMachineBundlesID);
} else {