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authorMisha Brukman <brukman+llvm@gmail.com>2004-06-24 23:53:24 +0000
committerMisha Brukman <brukman+llvm@gmail.com>2004-06-24 23:53:24 +0000
commite327e499138dac76c85076ba9494dab9500f81fa (patch)
tree9f6d49d1c219d6361b4864caa9932a6ab879a000 /lib/Target/PowerPC/PowerPCISelSimple.cpp
parent7f484a5fff140ade284a1af34641da067bea11ae (diff)
Add a `break' in the switch/case statement between the int/fp sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14385 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PowerPCISelSimple.cpp')
-rw-r--r--lib/Target/PowerPC/PowerPCISelSimple.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PowerPCISelSimple.cpp b/lib/Target/PowerPC/PowerPCISelSimple.cpp
index 34721eeef7..063001d60b 100644
--- a/lib/Target/PowerPC/PowerPCISelSimple.cpp
+++ b/lib/Target/PowerPC/PowerPCISelSimple.cpp
@@ -1049,7 +1049,6 @@ void ISel::promote32(unsigned targetReg, const ValueRecord &VR) {
///
void ISel::visitReturnInst(ReturnInst &I) {
Value *RetVal = I.getOperand(0);
-
switch (getClassB(RetVal->getType())) {
case cByte: // integral return values: extend or move into r3 and return
case cShort:
@@ -1303,6 +1302,7 @@ void ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI,
case cInt:
// Integral results are in r3
BuildMI(BB, PPC32::OR, 2, Ret.Reg).addReg(PPC32::R3).addReg(PPC32::R3);
+ break;
case cFP: // Floating-point return values live in f1
BuildMI(BB, PPC32::FMR, 1, Ret.Reg).addReg(PPC32::F1);
break;