diff options
| author | Misha Brukman <brukman+llvm@gmail.com> | 2004-07-21 20:30:18 +0000 |
|---|---|---|
| committer | Misha Brukman <brukman+llvm@gmail.com> | 2004-07-21 20:30:18 +0000 |
| commit | a31f1f7cb273156a90aa197db9a97946c0e5812c (patch) | |
| tree | a95a5457d63fd50a3f69b32308a3f979bb98f7f9 /lib/Target/PowerPC/PowerPCISelSimple.cpp | |
| parent | 17a9000ac81de110eabe222aa6f93a4f14fbfbfe (diff) | |
* Add the lost fix to define the second reg of a 2-reg representation of longs
* Fix opcode RLWNM -> RLWINM since it uses an immediate const shift value
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15087 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PowerPCISelSimple.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PowerPCISelSimple.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PowerPCISelSimple.cpp b/lib/Target/PowerPC/PowerPCISelSimple.cpp index 0ce018df32..25db30dfe7 100644 --- a/lib/Target/PowerPC/PowerPCISelSimple.cpp +++ b/lib/Target/PowerPC/PowerPCISelSimple.cpp @@ -1154,6 +1154,9 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB, BB = sinkMBB; BuildMI(BB, PPC32::PHI, 4, DestReg).addReg(FalseValue) .addMBB(copy0MBB).addReg(TrueValue).addMBB(copy1MBB); + // For a register pair representing a long value, define the second reg + if (getClass(TrueVal->getType()) == cLong) + BuildMI(BB, PPC32::LI, 1, DestReg+1).addImm(0); return; } @@ -2801,7 +2804,7 @@ void ISel::visitAllocaInst(AllocaInst &I) { // AlignedSize = and <AddedSize>, ~15 unsigned AlignedSize = makeAnotherReg(Type::UIntTy); - BuildMI(BB, PPC32::RLWNM, 4, AlignedSize).addReg(AddedSizeReg).addImm(0) + BuildMI(BB, PPC32::RLWINM, 4, AlignedSize).addReg(AddedSizeReg).addImm(0) .addImm(0).addImm(27); // Subtract size from stack pointer, thereby allocating some space. |