diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2012-06-11 19:57:01 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-06-11 19:57:01 +0000 |
| commit | bd5cafd9bbba2180e7179436fb29071201d5ea9f (patch) | |
| tree | 8ad1aeeaebe4d0092e8f63ce3df61a7e0eb44a87 /lib/Target/PowerPC/PPCSubtarget.h | |
| parent | 9770be91de745e4727c65c45d13de2a787aef89f (diff) | |
Rename the PPC target feature gpul to mfocrf.
The PPC target feature gpul (IsGigaProcessor) was only used for one thing:
To enable the generation of the MFOCRF instruction. Furthermore, this
instruction is available on other PPC cores outside of the G5 line. This
feature now corresponds to the HasMFOCRF flag.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158323 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCSubtarget.h')
| -rw-r--r-- | lib/Target/PowerPC/PPCSubtarget.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCSubtarget.h b/lib/Target/PowerPC/PPCSubtarget.h index 744a6304e4..7d9be55713 100644 --- a/lib/Target/PowerPC/PPCSubtarget.h +++ b/lib/Target/PowerPC/PPCSubtarget.h @@ -63,7 +63,7 @@ protected: unsigned DarwinDirective; /// Used by the ISel to turn in optimizations for POWER4-derived architectures - bool IsGigaProcessor; + bool HasMFOCRF; bool Has64BitSupport; bool Use64BitRegs; bool IsPPC64; @@ -140,7 +140,7 @@ public: bool hasFSQRT() const { return HasFSQRT; } bool hasSTFIWX() const { return HasSTFIWX; } bool hasAltivec() const { return HasAltivec; } - bool isGigaProcessor() const { return IsGigaProcessor; } + bool hasMFOCRF() const { return HasMFOCRF; } bool isBookE() const { return IsBookE; } const Triple &getTargetTriple() const { return TargetTriple; } |