diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2012-06-12 19:01:24 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-06-12 19:01:24 +0000 |
| commit | 16803097fbefa313fdadc3adede659bd0e52cec1 (patch) | |
| tree | adae514a243b76a64b371118ff635c54f340a934 /lib/Target/PowerPC/PPCSchedule.td | |
| parent | b9c592f4c554888c095863cf1e7cda350a371b6c (diff) | |
Split out the PPC instruction class IntSimple from IntGeneral.
On the POWER7, adds and logical operations can also be handled
in the load/store pipelines. We'll call these IntSimple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158366 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCSchedule.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCSchedule.td | 39 |
1 files changed, 20 insertions, 19 deletions
diff --git a/lib/Target/PowerPC/PPCSchedule.td b/lib/Target/PowerPC/PPCSchedule.td index 8c0a858905..6a6ccb9d98 100644 --- a/lib/Target/PowerPC/PPCSchedule.td +++ b/lib/Target/PowerPC/PPCSchedule.td @@ -25,6 +25,7 @@ def VFPU : FuncUnit; // vector floating point unit //===----------------------------------------------------------------------===// // Instruction Itinerary classes used for PowerPC // +def IntSimple : InstrItinClass; def IntGeneral : InstrItinClass; def IntCompare : InstrItinClass; def IntDivD : InstrItinClass; @@ -117,17 +118,17 @@ include "PPCScheduleA2.td" // // opcode itinerary class // ====== =============== -// add IntGeneral +// add IntSimple // addc IntGeneral // adde IntGeneral -// addi IntGeneral +// addi IntSimple // addic IntGeneral // addic. IntGeneral -// addis IntGeneral +// addis IntSimple // addme IntGeneral // addze IntGeneral -// and IntGeneral -// andc IntGeneral +// and IntSimple +// andc IntSimple // andi. IntGeneral // andis. IntGeneral // b BrB @@ -165,10 +166,10 @@ include "PPCScheduleA2.td" // eciwx LdStLoad // ecowx LdStLoad // eieio LdStLoad -// eqv IntGeneral -// extsb IntGeneral -// extsh IntGeneral -// extsw IntRotateD +// eqv IntSimple +// extsb IntSimple +// extsh IntSimple +// extsw IntSimple // fabs FPGeneral // fadd FPGeneral // fadds FPGeneral @@ -280,13 +281,13 @@ include "PPCScheduleA2.td" // mulld IntMulHD // mulli IntMulLI // mullw IntMulHW -// nand IntGeneral -// neg IntGeneral -// nor IntGeneral -// or IntGeneral -// orc IntGeneral -// ori IntGeneral -// oris IntGeneral +// nand IntSimple +// neg IntSimple +// nor IntSimple +// or IntSimple +// orc IntSimple +// ori IntSimple +// oris IntSimple // rfi SprRFI // rfid IntRFID // rldcl IntRotateD @@ -502,7 +503,7 @@ include "PPCScheduleA2.td" // vupklsb VecPerm // vupklsh VecPerm // vxor VecGeneral -// xor IntGeneral -// xori IntGeneral -// xoris IntGeneral +// xor IntSimple +// xori IntSimple +// xoris IntSimple // |