diff options
author | Chris Lattner <sabre@nondot.org> | 2010-11-14 19:53:02 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-11-14 19:53:02 +0000 |
commit | 293ef9ae0fd533429dc54d94c895c39a564466f7 (patch) | |
tree | 8ecef129704d237a5a42f73adec129afec7b258e /lib/Target/PowerPC/PPCMCInstLower.cpp | |
parent | 765fb1a446e0f1f338858dc628b4a7a60da37e80 (diff) |
stub out PPCMCInstLowering, add a new option that uses it and the new
instprinter when -enable-ppc-inst-printer is passed to llc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119061 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCMCInstLower.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCMCInstLower.cpp | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCMCInstLower.cpp b/lib/Target/PowerPC/PPCMCInstLower.cpp new file mode 100644 index 0000000000..afed393638 --- /dev/null +++ b/lib/Target/PowerPC/PPCMCInstLower.cpp @@ -0,0 +1,75 @@ +//===-- PPCMCInstLower.cpp - Convert PPC MachineInstr to an MCInst --------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains code to lower PPC MachineInstrs to their corresponding +// MCInst records. +// +//===----------------------------------------------------------------------===// + +#include "PPCMCInstLower.h" +#include "llvm/CodeGen/AsmPrinter.h" +#include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCInst.h" + +using namespace llvm; + +void PPCMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { + OutMI.setOpcode(MI->getOpcode()); + + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + const MachineOperand &MO = MI->getOperand(i); + + MCOperand MCOp; + switch (MO.getType()) { + default: + MI->dump(); + assert(0 && "unknown operand type"); + case MachineOperand::MO_Register: + assert(!MO.getSubReg() && "Subregs should be eliminated!"); + MCOp = MCOperand::CreateReg(MO.getReg()); + break; + case MachineOperand::MO_Immediate: + MCOp = MCOperand::CreateImm(MO.getImm()); + break; + case MachineOperand::MO_MachineBasicBlock: + MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create( + MO.getMBB()->getSymbol(), Ctx)); + break; +#if 0 + case MachineOperand::MO_GlobalAddress: + MCOp = LowerSymbolRefOperand(MO, GetSymbolRef(MO)); + break; + case MachineOperand::MO_ExternalSymbol: + MCOp = LowerSymbolRefOperand(MO, GetExternalSymbolSymbol(MO)); + break; + case MachineOperand::MO_JumpTableIndex: + MCOp = LowerSymbolOperand(MO, GetJumpTableSymbol(MO)); + break; + case MachineOperand::MO_ConstantPoolIndex: + MCOp = LowerSymbolOperand(MO, GetConstantPoolIndexSymbol(MO)); + break; + case MachineOperand::MO_BlockAddress: + MCOp = LowerSymbolOperand(MO, Printer.GetBlockAddressSymbol( + MO.getBlockAddress())); + break; +#endif +#if 0 + case MachineOperand::MO_FPImmediate: + APFloat Val = MO.getFPImm()->getValueAPF(); + bool ignored; + Val.convert(APFloat::IEEEdouble, APFloat::rmTowardZero, &ignored); + MCOp = MCOperand::CreateFPImm(Val.convertToDouble()); + break; +#endif + } + + OutMI.addOperand(MCOp); + } +} |