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authorHal Finkel <hfinkel@anl.gov>2012-06-22 23:10:08 +0000
committerHal Finkel <hfinkel@anl.gov>2012-06-22 23:10:08 +0000
commit009f7afbeb77d1cc8e962bac7057b73b6d39d62f (patch)
tree362e05a353bb2b5cc24792048cd92cf7a2c5b8ad /lib/Target/PowerPC/PPCInstrInfo.td
parente5457d21169105b695a7e32d4424a35bb9ca7fa2 (diff)
Add support for the PPC isel instruction.
The isel (integer select) instruction is supported on the 440 and A2 embedded cores and on the POWER7. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159045 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.td')
-rw-r--r--lib/Target/PowerPC/PPCInstrInfo.td7
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 29f7875a79..9b390461d8 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1398,6 +1398,13 @@ let Uses = [RM] in {
}
let PPC970_Unit = 1 in { // FXU Operations.
+ def ISEL : AForm_1<31, 15,
+ (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB, pred:$cond),
+ "isel $rT, $rA, $rB, $cond", IntGeneral,
+ []>;
+}
+
+let PPC970_Unit = 1 in { // FXU Operations.
// M-Form instructions. rotate and mask instructions.
//
let isCommutable = 1 in {