diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2007-04-25 07:12:14 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-04-25 07:12:14 +0000 |
| commit | 1e341729dd003ca33ecea4abf13134f20062c5f8 (patch) | |
| tree | 4bc71a3892c29b85687c6c6d46531aced64c4e01 /lib/Target/PowerPC/PPCInstrInfo.cpp | |
| parent | 79b3bd395dc3303cde65e18e0524ed2f70268c99 (diff) | |
Relex assertions to account for additional implicit def / use operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36430 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index 1ba701f6a7..89b5c9c890 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -38,7 +38,7 @@ bool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, MachineOpCode oc = MI.getOpcode(); if (oc == PPC::OR || oc == PPC::OR8 || oc == PPC::VOR || oc == PPC::OR4To8 || oc == PPC::OR8To4) { // or r1, r2, r2 - assert(MI.getNumOperands() == 3 && + assert(MI.getNumOperands() >= 3 && MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && MI.getOperand(2).isRegister() && @@ -49,7 +49,7 @@ bool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, return true; } } else if (oc == PPC::ADDI) { // addi r1, r2, 0 - assert(MI.getNumOperands() == 3 && + assert(MI.getNumOperands() >= 3 && MI.getOperand(0).isRegister() && MI.getOperand(2).isImmediate() && "invalid PPC ADDI instruction!"); @@ -59,7 +59,7 @@ bool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, return true; } } else if (oc == PPC::ORI) { // ori r1, r2, 0 - assert(MI.getNumOperands() == 3 && + assert(MI.getNumOperands() >= 3 && MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && MI.getOperand(2).isImmediate() && @@ -71,7 +71,7 @@ bool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, } } else if (oc == PPC::FMRS || oc == PPC::FMRD || oc == PPC::FMRSD) { // fmr r1, r2 - assert(MI.getNumOperands() == 2 && + assert(MI.getNumOperands() >= 2 && MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && "invalid PPC FMR instruction"); @@ -79,7 +79,7 @@ bool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, destReg = MI.getOperand(0).getReg(); return true; } else if (oc == PPC::MCRF) { // mcrf cr1, cr2 - assert(MI.getNumOperands() == 2 && + assert(MI.getNumOperands() >= 2 && MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && "invalid PPC MCRF instruction"); |