Rewrite the branch selector to be correct in the face of large functions.

The algorithm it used before wasn't 100% correct, we now use an iterative
expansion model.  This fixes assembler errors when compiling 403.gcc with
tail merging enabled.

Change the way the branch selector works overall: Now, the isel generates
PPC::BCC instructions (as it used to) directly, and these BCC instructions
are emitted to the output or jitted directly if branches don't need
expansion.  Only if branches need expansion are instructions rewritten
and created.  This should make branch select faster, and eliminates the
Bxx instructions from the .td file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31837 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 2 insertions, 16 deletions

diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td
index abf2267f06..2b19bc6d1d 100644
--- a/lib/Target/PowerPC/PPCInstrFormats.td
+++ b/lib/Target/PowerPC/PPCInstrFormats.td
@@ -60,22 +60,8 @@ class IForm<bits<6> opcode, bit aa, bit lk, dag OL, string asmstr,
 }
 
 // 1.7.2 B-Form
-class BForm<bits<6> opcode, bit aa, bit lk, bits<5> bo, bits<2> bicode, dag OL, 
-            string asmstr, InstrItinClass itin>
-  : I<opcode, OL, asmstr, itin> {
-  bits<3>  CR;
-  bits<14> BD;
-
-  let Inst{6-10}  = bo;
-  let Inst{11-13} = CR;
-  let Inst{14-15} = bicode;
-  let Inst{16-29} = BD;
-  let Inst{30}    = aa;
-  let Inst{31}    = lk;
-}
-
-class CBForm<bits<6> opcode, bit aa, bit lk, dag OL, 
-             string asmstr> : I<opcode, OL, asmstr, BrB> {
+class BForm<bits<6> opcode, bit aa, bit lk, dag OL, string asmstr>
+  : I<opcode, OL, asmstr, BrB> {
   bits<7> BIBO;  // 2 bits of BI and 5 bits of BO.
   bits<3>  CR;
   bits<14> BD;