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| author | Hal Finkel <hfinkel@anl.gov> | 2012-08-07 17:04:20 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-08-07 17:04:20 +0000 |
| commit | 8da94ad6e0947690201c543da556ec0396ad9912 (patch) | |
| tree | 9030e18fc6eb8470d3a3e784d1137e353220288b /lib/Target/PowerPC/PPCInstr64Bit.td | |
| parent | 351f83be64057380877615153fe5dc50308ab017 (diff) | |
Add a comment about mftb vs. mfspr on PPC.
Thanks to Alex Rosenberg for the suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161428 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstr64Bit.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstr64Bit.td | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td index 5df735aaba..39778a5dc1 100644 --- a/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/lib/Target/PowerPC/PPCInstr64Bit.td @@ -269,6 +269,10 @@ let Pattern = [(set G8RC:$rT, readcyclecounter)] in def MFTB8 : XFXForm_1_ext<31, 339, 268, (outs G8RC:$rT), (ins), "mfspr $rT, 268", SprMFTB>, PPC970_DGroup_First, PPC970_Unit_FXU; +// Note that encoding mftb using mfspr is now the preferred form, +// and has been since at least ISA v2.03. The mftb instruction has +// now been phased out. Using mfspr, however, is known not to work on +// the POWER3. let Defs = [X1], Uses = [X1] in def DYNALLOC8 : Pseudo<(outs G8RC:$result), (ins G8RC:$negsize, memri:$fpsi),"", |