diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-08-26 00:52:45 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-08-26 00:52:45 +0000 |
| commit | e4bc9ea0a560d8a0ba42f5a2da617e1f1f834710 (patch) | |
| tree | daa4a0347d9546c7396e6ff54c4875e637356a2d /lib/Target/PowerPC/PPCISelPattern.cpp | |
| parent | d7050a9c50211dd215cb3c2bc28b4fb6bfa4a116 (diff) | |
add initial support for converting select_cc -> fsel in the legalizer
instead of in the backend. This currently handles fsel cases with registers,
but doesn't have the 0.0 and -0.0 optimization enabled yet.
Once this is finished, special hack for fp immediates can go away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23075 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelPattern.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 07529c7e01..102b4b3845 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -829,6 +829,12 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) { default: Node->dump(); std::cerr << '\n'; assert(0 && "Node not handled!\n"); + case ISD::BUILTIN_OP_END+PPC::FSEL: + Tmp1 = SelectExpr(N.getOperand(0)); + Tmp2 = SelectExpr(N.getOperand(1)); + Tmp3 = SelectExpr(N.getOperand(2)); + BuildMI(BB, PPC::FSEL, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3); + return Result; case ISD::UNDEF: if (Node->getValueType(0) == MVT::i32) BuildMI(BB, PPC::IMPLICIT_DEF_GPR, 0, Result); |