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| author | Chris Lattner <sabre@nondot.org> | 2005-05-12 02:06:00 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-05-12 02:06:00 +0000 |
| commit | 9bce0f92c3f1be7ad738ed018c7dd4f4c4bd979a (patch) | |
| tree | 1f28e216d9be2bb94944c48b68cec3b29207a827 /lib/Target/PowerPC/PPCISelPattern.cpp | |
| parent | 39d7f8f3383552868b3ea2f3fa8cabca78decfbd (diff) | |
These targets don't like setcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21884 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelPattern.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 536a07710d..3281313617 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -43,6 +43,9 @@ namespace { int ReturnAddrIndex; // FrameIndex for return slot. public: PPC32TargetLowering(TargetMachine &TM) : TargetLowering(TM) { + // Fold away setcc operations if possible. + setSetCCIsExpensive(); + // Set up the register classes. addRegisterClass(MVT::i32, PPC32::GPRCRegisterClass); addRegisterClass(MVT::f32, PPC32::FPRCRegisterClass); |