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| author | Chris Lattner <sabre@nondot.org> | 2005-08-10 03:40:09 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-08-10 03:40:09 +0000 |
| commit | 979a21e766eaea8881ee8b3b26c24b0771a8dfcf (patch) | |
| tree | 090c08b0e049479fe6755b00886bba871e0d3ac6 /lib/Target/PowerPC/PPCISelPattern.cpp | |
| parent | 94f40324481c04ae8718967b4b5a3d7ca22370e6 (diff) | |
Fix a bug compiling: select (i32 < i32), f32, f32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22747 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelPattern.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index fa7518d045..095afc647a 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -2140,6 +2140,7 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) { ISD::CondCode CC; if (Cond->getOpcode() == ISD::SETCC && !MVT::isInteger(N.getOperand(1).getValueType()) && + !MVT::isInteger(Cond->getOperand(1).getValueType()) && cast<CondCodeSDNode>(Cond->getOperand(2))->get() != ISD::SETEQ && cast<CondCodeSDNode>(Cond->getOperand(2))->get() != ISD::SETNE) { MVT::ValueType VT = Cond->getOperand(0).getValueType(); |