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author | Chris Lattner <sabre@nondot.org> | 2005-08-09 18:08:41 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2005-08-09 18:08:41 +0000 |
commit | 2f46055cc22ff5a0118425d7823b93d3992acbd0 (patch) | |
tree | 124d16e41e0e75cfec06e50e07ec6b3f1a8a0e93 /lib/Target/PowerPC/PPCISelPattern.cpp | |
parent | dd8ffdd6853edd0a21e14bd43fe197df50939a5f (diff) |
Fix CodeGen/Generic/div-neg-power-2.ll, a regression from last night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22726 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelPattern.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 7cf17f59e7..39f319c26e 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -1871,6 +1871,8 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) { return Result; } else if ((signed)Tmp3 < 0 && isPowerOf2_32(-Tmp3)) { Tmp3 = Log2_32(-Tmp3); + Tmp2 = SelectExpr(N.getOperand(0)); + Tmp1 = MakeReg(MVT::i32); unsigned Tmp4 = MakeReg(MVT::i32); BuildMI(BB, PPC::SRAWI, 2, Tmp1).addReg(Tmp2).addImm(Tmp3); BuildMI(BB, PPC::ADDZE, 1, Tmp4).addReg(Tmp1); |